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AJvYcCVztPVv0MlhHBZX/Hx8IYDJWWobjDBdvm0mlm2YMXf/btUAmjU0aUaBLlTWKFXQNlOG2WU=@vger.kernel.org X-Gm-Message-State: AOJu0YzkM4K/d4iVoaSjEvXM4aeVpL830nKkFSPpksg5s7/SxRr/m0Hs MLVW8mc3bPPusPH8hKxy+1DyQQ9r5ZTyMPbCxD+k8rRoJBzDiW//jRTAbjSlnR6tuZqo3nXp+xB 1s5oswQ== X-Google-Smtp-Source: AGHT+IH4Kskgmch7JegC5v+NUo5paOR/XhwhXs3EqsmT9/QyBt92yY6pX0mhWpbs9SQZBDrzTmU7nahdad8= X-Received: from pgbds10.prod.google.com ([2002:a05:6a02:430a:b0:b47:34d0:d386]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:a111:b0:240:1e4a:64cc with SMTP id adf61e73a8af0-2d10f57e829mr4372465637.12.1758646978582; Tue, 23 Sep 2025 10:02:58 -0700 (PDT) Date: Tue, 23 Sep 2025 10:02:57 -0700 In-Reply-To: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250919223258.1604852-1-seanjc@google.com> <20250919223258.1604852-51-seanjc@google.com> Message-ID: Subject: Re: [PATCH v16 50/51] KVM: selftests: Verify MSRs are (not) in save/restore list when (un)supported From: Sean Christopherson To: Chao Gao Cc: Paolo Bonzini , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Lendacky , Mathias Krause , John Allen , Rick Edgecombe , Binbin Wu , Xiaoyao Li , Maxim Levitsky , Zhang Yi Z , Xin Li Content-Type: text/plain; charset="us-ascii" On Tue, Sep 23, 2025, Chao Gao wrote: > On Fri, Sep 19, 2025 at 03:32:57PM -0700, Sean Christopherson wrote: > >Add a check in the MSRs test to verify that KVM's reported support for > >MSRs with feature bits is consistent between KVM's MSR save/restore lists > >and KVM's supported CPUID. > > > > >To deal with Intel's wonderful decision to bundle IBT and SHSTK under CET, > >track the "second" feature to avoid false failures when running on a CPU > >with only one of IBT or SHSTK. > > is this paragraph related to this patch? the tracking is done in a previous > patch instead of this patch. So maybe just drop this paragraph. > > > > >Signed-off-by: Sean Christopherson > >--- > > tools/testing/selftests/kvm/x86/msrs_test.c | 22 ++++++++++++++++++++- > > 1 file changed, 21 insertions(+), 1 deletion(-) > > > >diff --git a/tools/testing/selftests/kvm/x86/msrs_test.c b/tools/testing/selftests/kvm/x86/msrs_test.c > >index 7c6d846e42dd..91dc66bfdac2 100644 > >--- a/tools/testing/selftests/kvm/x86/msrs_test.c > >+++ b/tools/testing/selftests/kvm/x86/msrs_test.c > >@@ -437,12 +437,32 @@ static void test_msrs(void) > > } > > > > for (idx = 0; idx < ARRAY_SIZE(__msrs); idx++) { > >- if (msrs[idx].is_kvm_defined) { > >+ struct kvm_msr *msr = &msrs[idx]; > >+ > >+ if (msr->is_kvm_defined) { > > for (i = 0; i < NR_VCPUS; i++) > > host_test_kvm_reg(vcpus[i]); > > continue; > > } > > > >+ /* > >+ * Verify KVM_GET_SUPPORTED_CPUID and KVM_GET_MSR_INDEX_LIST > >+ * are consistent with respect to MSRs whose existence is > >+ * enumerated via CPUID. Note, using LM as a dummy feature > >+ * is a-ok here as well, as all MSRs that abuse LM should be > >+ * unconditionally reported in the save/restore list (and > > I am not sure why LM is mentioned here. Is it a leftover from one of your > previous attempts? Yeah, at one point I was using LM as the NONE feature. I'll delete the entire sentence. > > >+ * selftests are 64-bit only). Note #2, skip the check for > >+ * FS/GS.base MSRs, as they aren't reported in the save/restore > >+ * list since their state is managed via SREGS. > >+ */ > >+ TEST_ASSERT(msr->index == MSR_FS_BASE || msr->index == MSR_GS_BASE || > >+ kvm_msr_is_in_save_restore_list(msr->index) == > >+ (kvm_cpu_has(msr->feature) || kvm_cpu_has(msr->feature2)), > >+ "%s %s save/restore list, but %s according to CPUID", msr->name, > > ^ an "in" is missing here. Heh, I had added this in a local version when debugging, but forgot to push the fix. Added now. diff --git a/tools/testing/selftests/kvm/x86/msrs_test.c b/tools/testing/selftests/kvm/x86/msrs_test.c index c2ab75e5d9ea..40d918aedce6 100644 --- a/tools/testing/selftests/kvm/x86/msrs_test.c +++ b/tools/testing/selftests/kvm/x86/msrs_test.c @@ -455,17 +455,14 @@ static void test_msrs(void) /* * Verify KVM_GET_SUPPORTED_CPUID and KVM_GET_MSR_INDEX_LIST * are consistent with respect to MSRs whose existence is - * enumerated via CPUID. Note, using LM as a dummy feature - * is a-ok here as well, as all MSRs that abuse LM should be - * unconditionally reported in the save/restore list (and - * selftests are 64-bit only). Note #2, skip the check for - * FS/GS.base MSRs, as they aren't reported in the save/restore - * list since their state is managed via SREGS. + * enumerated via CPUID. Skip the check for FS/GS.base MSRs, + * as they aren't reported in the save/restore list since their + * state is managed via SREGS. */ TEST_ASSERT(msr->index == MSR_FS_BASE || msr->index == MSR_GS_BASE || kvm_msr_is_in_save_restore_list(msr->index) == (kvm_cpu_has(msr->feature) || kvm_cpu_has(msr->feature2)), - "%s %s save/restore list, but %s according to CPUID", msr->name, + "%s %s in save/restore list, but %s according to CPUID", msr->name, kvm_msr_is_in_save_restore_list(msr->index) ? "is" : "isn't", (kvm_cpu_has(msr->feature) || kvm_cpu_has(msr->feature2)) ? "supported" : "unsupported");