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From: Sean Christopherson <seanjc@google.com>
To: Brendan Jackman <jackmanb@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Subject: Re: [PATCH v3 1/4] KVM: VMX: Flush CPU buffers as needed if L1D cache flush is skipped
Date: Tue, 21 Oct 2025 09:48:30 -0700	[thread overview]
Message-ID: <aPe5XpjqItip9KbP@google.com> (raw)
In-Reply-To: <DDO1FFOJKSTK.3LSOUFU5RM6PD@google.com>

On Tue, Oct 21, 2025, Brendan Jackman wrote:
> On Thu Oct 16, 2025 at 8:04 PM UTC, Sean Christopherson wrote:
> > If the L1D flush for L1TF is conditionally enabled, flush CPU buffers to
> > mitigate MMIO Stale Data as needed if KVM skips the L1D flush, e.g.
> > because none of the "heavy" paths that trigger an L1D flush were tripped
> > since the last VM-Enter.
> 
> Presumably the assumption here was that the L1TF conditionality is good
> enough for the MMIO stale data vuln too? I'm not qualified to assess if
> that assumption is true, but also even if it's a good one it's
> definitely not obvious to users that the mitigation you pick for L1TF
> has this side-effect. So I think I'm on board with calling this a bug.

Yeah, that's where I'm at as well.

> If anyone turns out to be depending on the current behaviour for
> performance I think they should probably add it back as a separate flag.

...

> > @@ -6722,6 +6722,7 @@ static noinstr void vmx_l1d_flush(struct kvm_vcpu *vcpu)
> >  		:: [flush_pages] "r" (vmx_l1d_flush_pages),
> >  		    [size] "r" (size)
> >  		: "eax", "ebx", "ecx", "edx");
> > +	return true;
> 
> The comment in the caller says the L1D flush "includes CPU buffer clear
> to mitigate MDS" - do we actually know that this software sequence
> mitigates the MMIO stale data vuln like the verw does? (Do we even know if
> it mitigates MDS?)
> 
> Anyway, if this is an issue, it's orthogonal to this patch.

Pawan, any idea?

  reply	other threads:[~2025-10-21 16:48 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-16 20:04 [PATCH v3 0/4] KVM: VMX: Unify L1D flush for L1TF Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 1/4] KVM: VMX: Flush CPU buffers as needed if L1D cache flush is skipped Sean Christopherson
2025-10-21 13:34   ` Brendan Jackman
2025-10-21 16:48     ` Sean Christopherson [this message]
2025-10-21 23:30       ` Pawan Gupta
2025-10-22  1:20         ` Pawan Gupta
2025-10-27 22:03           ` Jim Mattson
2025-10-27 23:17             ` Pawan Gupta
2025-10-27 23:58               ` Jim Mattson
2025-10-28  0:19                 ` Pawan Gupta
2025-10-28  0:49                   ` Pawan Gupta
2025-10-27 21:09         ` Pawan Gupta
2025-10-21 23:18   ` Pawan Gupta
2025-10-22  1:59     ` Brendan Jackman
2025-10-22 15:04       ` Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 2/4] KVM: VMX: Bundle all L1 data cache flush mitigation code together Sean Christopherson
2025-10-21 13:38   ` Brendan Jackman
2025-10-16 20:04 ` [PATCH v3 3/4] KVM: VMX: Disable L1TF L1 data cache flush if CONFIG_CPU_MITIGATIONS=n Sean Christopherson
2025-10-22  1:36   ` Pawan Gupta
2025-10-22 15:06     ` Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 4/4] KVM: x86: Unify L1TF flushing under per-CPU variable Sean Christopherson
2025-10-22  1:59   ` Pawan Gupta

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