Re: [PATCH v5 00/24] ARM64 PMU Partitioning

Will Deacon
2026-01-15T13:03:01Z

On Tue, Dec 09, 2025 at 03:00:59PM -0800, Oliver Upton wrote:
> On Tue, Dec 09, 2025 at 08:50:57PM +0000, Colton Lewis wrote:
> > This series creates a new PMU scheme on ARM, a partitioned PMU that
> > allows reserving a subset of counters for more direct guest access,
> > significantly reducing overhead. More details, including performance
> > benchmarks, can be read in the v1 cover letter linked below.
> >
> > An overview of what this series accomplishes was presented at KVM
> > Forum 2025. Slides [1] and video [2] are linked below.
> >
> > The long duration between v4 and v5 is due to time spent on this
> > project being monopolized preparing this feature for internal
> > production. As a result, there are too many improvements to fully list
> > here, but I will cover the notable ones.
>
> Thanks for reposting. I think there's still quite a bit of ground to
> cover on the KVM side of this, but I would definitely appreciate it if
> someone with more context on the perf side of things could chime in.
>
> Will, IIRC you had some thoughts around counter allocation, right?

Right, I was hoping that the host counter reservation could be more
dynamic than a cmdline option. Perf already has support for pinning
events to a CPU, so the concept of some counters being unavailable
shouldn't be too much for the driver to handle. You might just need to
create some fake pinned events so that perf code understands what is
happening.

Will