From: Chao Gao <chao.gao@intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>, <kvm@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Dongli Zhang <dongli.zhang@oracle.com>
Subject: Re: [PATCH v3 10/10] KVM: x86: Update APICv ISR (a.k.a. SVI) as part of kvm_apic_update_apicv()
Date: Fri, 26 Dec 2025 13:16:58 +0800 [thread overview]
Message-ID: <aU4aSrhA+Ygdibjj@intel.com> (raw)
In-Reply-To: <20251205231913.441872-11-seanjc@google.com>
On Fri, Dec 05, 2025 at 03:19:13PM -0800, Sean Christopherson wrote:
>Fold the calls to .hwapic_isr_update() in kvm_apic_set_state() and
>__kvm_vcpu_update_apicv() into kvm_apic_update_apicv(), as updating SVI is
>directly related to updating KVM's own cache of ISR information, e.g.
>SVI is more or less the APICv equivalent of highest_isr_cache.
>
>Note, calling .hwapic_isr_update() during kvm_apic_update_apicv() has two
>benign side effects. First, it adds a call during kvm_lapic_reset(), but
>that's a glorified nop as the ISR has already been zeroed. Second, it
>changes the order between .hwapic_isr_update() and
>.apicv_post_state_restore() in kvm_apic_set_state(), but the former is
>VMX-only and the latter is SVM-only, i.e. is also a glorified nop.
>
>Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Chao Gao <chao.gao@intel.com>
next prev parent reply other threads:[~2025-12-26 5:17 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-05 23:19 [PATCH v3 00/10] KVM: VMX: Fix APICv activation bugs Sean Christopherson
2025-12-05 23:19 ` [PATCH v3 01/10] KVM: VMX: Update SVI during runtime APICv activation Sean Christopherson
2025-12-05 23:19 ` [PATCH v3 02/10] KVM: nVMX: Immediately refresh APICv controls as needed on nested VM-Exit Sean Christopherson
2025-12-05 23:19 ` [PATCH v3 03/10] KVM: selftests: Add a test to verify APICv updates (while L2 is active) Sean Christopherson
2025-12-12 3:24 ` Chao Gao
2025-12-12 18:01 ` Sean Christopherson
2025-12-05 23:19 ` [PATCH v3 04/10] KVM: nVMX: Switch to vmcs01 to update PML controls on-demand if L2 is active Sean Christopherson
2025-12-24 7:53 ` Chao Gao
2025-12-05 23:19 ` [PATCH v3 05/10] KVM: nVMX: Switch to vmcs01 to update TPR threshold " Sean Christopherson
2025-12-25 6:38 ` Chao Gao
2025-12-05 23:19 ` [PATCH v3 06/10] KVM: nVMX: Switch to vmcs01 to update SVI " Sean Christopherson
2025-12-25 8:30 ` Chao Gao
2025-12-30 21:03 ` Sean Christopherson
2025-12-31 2:17 ` Chao Gao
2025-12-05 23:19 ` [PATCH v3 07/10] KVM: nVMX: Switch to vmcs01 to refresh APICv controls " Sean Christopherson
2025-12-26 1:45 ` Chao Gao
2025-12-05 23:19 ` [PATCH v3 08/10] KVM: nVMX: Switch to vmcs01 to update APIC page " Sean Christopherson
2025-12-26 2:01 ` Chao Gao
2025-12-05 23:19 ` [PATCH v3 09/10] KVM: nVMX: Switch to vmcs01 to set virtual APICv mode " Sean Christopherson
2025-12-26 5:16 ` Chao Gao
2025-12-05 23:19 ` [PATCH v3 10/10] KVM: x86: Update APICv ISR (a.k.a. SVI) as part of kvm_apic_update_apicv() Sean Christopherson
2025-12-26 5:16 ` Chao Gao [this message]
2025-12-10 0:25 ` [PATCH v3 00/10] KVM: VMX: Fix APICv activation bugs Sean Christopherson
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