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From: Chao Gao <chao.gao@intel.com>
To: "Chang S. Bae" <chang.seok.bae@intel.com>
Cc: <pbonzini@redhat.com>, <seanjc@google.com>, <kvm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 08/16] KVM: VMX: Support extended register index in exit handling
Date: Fri, 26 Dec 2025 13:27:31 +0800	[thread overview]
Message-ID: <aU4cw+l+R+ukJZi7@intel.com> (raw)
In-Reply-To: <20251221040742.29749-9-chang.seok.bae@intel.com>

On Sun, Dec 21, 2025 at 04:07:34AM +0000, Chang S. Bae wrote:
>Support 5-bit register indices in VMCS fields when APX feature is
>enumerated.
>
>The presence of the extended instruction information field is indicated
>by APX enumeration, regardless of the XCR0.APX bit setting.
>
>With APX enumerated, the previously reserved bit in the exit qualification
>can be referenced safely now. However, there is no guarantee that older
>implementations always zeroed this bit.
>
>Link: https://lore.kernel.org/7bb14722-c036-4835-8ed9-046b4e67909e@redhat.com
>Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
>Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
>---
>Changes since last version:
>* Switch the condition for using the extended instruction information
>  from checking XCR0 to relying on APX enumeration (Paolo).
>* Rewrite the changelog to clarify this behavior.
>---
> arch/x86/kvm/vmx/vmx.h | 25 +++++++++++++++++++++----
> 1 file changed, 21 insertions(+), 4 deletions(-)
>
>diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
>index f8dbad161717..937f862f060d 100644
>--- a/arch/x86/kvm/vmx/vmx.h
>+++ b/arch/x86/kvm/vmx/vmx.h
>@@ -372,12 +372,26 @@ struct vmx_insn_info {
> 	union insn_info info;
> };
> 
>-static inline struct vmx_insn_info vmx_get_insn_info(struct kvm_vcpu *vcpu __maybe_unused)

...

>+/*
>+ * The APX enumeration guarantees the presence of the extended fields.
>+ * The host CPUID bit alone is sufficient to rely on it.
>+ */
>+static inline bool vmx_insn_info_extended(void)
>+{
>+	return static_cpu_has(X86_FEATURE_APX);
>+}
>+
>+static inline struct vmx_insn_info vmx_get_insn_info(struct kvm_vcpu *vcpu)

@vcpu isn't used in the function body, so it should probably be dropped.

> {
> 	struct vmx_insn_info insn;
> 
>-	insn.extended  = false;
>-	insn.info.word = vmcs_read32(VMX_INSTRUCTION_INFO);
>+	if (vmx_insn_info_extended()) {
>+		insn.extended   = true;
>+		insn.info.dword = vmcs_read64(EXTENDED_INSTRUCTION_INFO);
>+	} else {
>+		insn.extended  = false;
>+		insn.info.word = vmcs_read32(VMX_INSTRUCTION_INFO);
>+	}
> 
> 	return insn;
> }

  reply	other threads:[~2025-12-26  5:27 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-21  4:07 [PATCH 00/16] KVM: x86: Enable APX for guests Chang S. Bae
2025-12-21  4:07 ` [PATCH 01/16] KVM: x86: Rename register accessors to be GPR-specific Chang S. Bae
2025-12-21  4:07 ` [PATCH 02/16] KVM: x86: Refactor GPR accessors to differentiate register access types Chang S. Bae
2025-12-21  4:07 ` [PATCH 03/16] KVM: x86: Implement accessors for extended GPRs Chang S. Bae
2025-12-22 14:23   ` Paolo Bonzini
2025-12-21  4:07 ` [PATCH 04/16] KVM: VMX: Introduce unified instruction info structure Chang S. Bae
2025-12-21  4:07 ` [PATCH 05/16] KVM: VMX: Refactor instruction information retrieval Chang S. Bae
2025-12-21  4:07 ` [PATCH 06/16] KVM: VMX: Refactor GPR index retrieval from exit qualification Chang S. Bae
2025-12-21  4:07 ` [PATCH 07/16] KVM: nVMX: Propagate the extended instruction info field Chang S. Bae
2025-12-31  1:38   ` Chao Gao
2025-12-21  4:07 ` [PATCH 08/16] KVM: VMX: Support extended register index in exit handling Chang S. Bae
2025-12-26  5:27   ` Chao Gao [this message]
2025-12-21  4:07 ` [PATCH 09/16] KVM: emulate: Support EGPR accessing and tracking Chang S. Bae
2025-12-21  4:07 ` [PATCH 10/16] KVM: emulate: Handle EGPR index and REX2-incompatible opcodes Chang S. Bae
2025-12-22 14:36   ` Paolo Bonzini
2025-12-21  4:07 ` [PATCH 11/16] KVM: emulate: Support REX2-prefixed opcode decode Chang S. Bae
2025-12-21  4:07 ` [PATCH 12/16] KVM: emulate: Reject EVEX-prefixed instructions Chang S. Bae
2025-12-21  4:07 ` [PATCH 13/16] KVM: x86: Guard valid XCR0.APX settings Chang S. Bae
2025-12-21  4:07 ` [PATCH 14/16] KVM: x86: Expose APX foundational feature bit to guests Chang S. Bae
2025-12-21  4:07 ` [PATCH 15/16] KVM: x86: Expose APX sub-features " Chang S. Bae
2025-12-21  4:07 ` [PATCH 16/16] KVM: x86: selftests: Add APX state handling and XCR0 sanity checks Chang S. Bae
2025-12-22 14:53 ` [PATCH 00/16] KVM: x86: Enable APX for guests Paolo Bonzini

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