From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5C6132E137; Mon, 26 Jan 2026 11:14:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769426058; cv=none; b=FgipbShdcx4s3iVdCdknKZSYwohnZE7OVKgVDPHIEZh/Z1wqiZR5P8uDw/Y1exBdZZ5cIu5x1OY8U+dnxPDrjmR00ZDAd7NEUHR8dw9kp49Mv6suMJJzoQWvgs6SVHcNBQaatwr+uREuH/m3Qa1GqwxhGnD10krjMbE6o6NgxCw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769426058; c=relaxed/simple; bh=2KvsABCVidNUiCIvpimircyvbgQJu/c+OPtijk7JUhg=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=DzJ7PCLjLEuu6vvpCTUU5JQ6n+uozk/1/P4xgCJqZiqiSElMKbF2RWTgR8ga3OaIqERoDkI/S1j/kYkRzofke8qTY6wKUpP6cMjpS4scEG/yWrI4ILnzlu+Q5EGK0GcuOHp9uDshysWawKIVGAh8qy8XG0IQAnR1ITBMGaXwGG0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=N3PJatvc; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="N3PJatvc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769426058; x=1800962058; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=2KvsABCVidNUiCIvpimircyvbgQJu/c+OPtijk7JUhg=; b=N3PJatvchInb5JF7w7isktQ4FyHdUYubmaYt9MBGOc25ieV1dJq4OYGf Akq+G7fBIwl+5651J6YhotMSpz9mdu66IhSGG4cUW8YcQpOmkG6qvIQtk VobYB5/aH/LG86Yk1ON+kgdtVwKyOi/uxvZLJ5E0GeY2XMKQ8Y7L1x2x9 mYbCtQA3MKtBoC6Dt77qFMHZBofPWfcyT+D0dAkzB2z0JwlWsWpMNOHbf 5LczM+igeORsL7hb5X18ew1FTd+KVHpK3jKMxyfJhyI56UsSrFeEaM79a afQQZjLwaqp73bNheHlFMii3PMzBipL1rwh6EKw8+kSkhNX6TuTRrL5sq Q==; X-CSE-ConnectionGUID: R2K76vjYSSqZQUNfBDqGdA== X-CSE-MsgGUID: aCCazxLCRHaMsuh9L7ooKg== X-IronPort-AV: E=McAfee;i="6800,10657,11682"; a="69624744" X-IronPort-AV: E=Sophos;i="6.21,255,1763452800"; d="scan'208";a="69624744" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2026 03:14:17 -0800 X-CSE-ConnectionGUID: eEwpCwmhR8Op3adN4iK8UQ== X-CSE-MsgGUID: uWQg3BXUQiqCgTPx7KKaGA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,255,1763452800"; d="scan'208";a="208083134" Received: from krybak-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.55]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2026 03:14:10 -0800 Date: Mon, 26 Jan 2026 13:14:07 +0200 From: Tony Lindgren To: Chao Gao Cc: linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, x86@kernel.org, reinette.chatre@intel.com, ira.weiny@intel.com, kai.huang@intel.com, dan.j.williams@intel.com, yilun.xu@linux.intel.com, sagis@google.com, vannapurve@google.com, paulmck@kernel.org, nik.borisov@suse.com, zhenzhong.duan@intel.com, seanjc@google.com, rick.p.edgecombe@intel.com, kas@kernel.org, dave.hansen@linux.intel.com, vishal.l.verma@intel.com, Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" Subject: Re: [PATCH v3 23/26] x86/virt/tdx: Enable TDX Module runtime updates Message-ID: References: <20260123145645.90444-1-chao.gao@intel.com> <20260123145645.90444-24-chao.gao@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260123145645.90444-24-chao.gao@intel.com> On Fri, Jan 23, 2026 at 06:55:31AM -0800, Chao Gao wrote: > --- a/arch/x86/include/asm/tdx.h > +++ b/arch/x86/include/asm/tdx.h > @@ -32,6 +32,9 @@ > #define TDX_SUCCESS 0ULL > #define TDX_RND_NO_ENTROPY 0x8000020300000000ULL > > +/* Bit definitions of TDX_FEATURES0 metadata field */ > +#define TDX_FEATURES0_TD_PRESERVING BIT(1) > +#define TDX_FEATURES0_NO_RBP_MOD BIT(18) > #ifndef __ASSEMBLER__ > > #include How about let's put these defines into arch/x86/include/asm/shared/tdx.h instead? And use BIT_ULL? This would allow cleaning up arch/x86/kvm/vmx/tdx.c in a follow-up patch for MD_FIELD_ID_FEATURES0_TOPOLOGY_ENUM to use TDX_FEATURES0_TOPOLOGY_ENUM BIT_ULL(20). Of course it can be done later on too, so: Reviewed-by: Tony Lindgren