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From: Maxim Levitsky <mlevitsk@redhat.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Alejandro Jimenez <alejandro.j.jimenez@oracle.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Li RongQing <lirongqing@baidu.com>
Subject: Re: [PATCH v4 28/32] KVM: SVM: Require logical ID to be power-of-2 for AVIC entry
Date: Wed, 04 Jan 2023 12:08:38 +0200	[thread overview]
Message-ID: <aba3787196caa812cee04f840dce26ac8a79eb7f.camel@redhat.com> (raw)
In-Reply-To: <b002fd18c2abdfe5f4395be38858f461b3c76ac3.camel@redhat.com>

On Thu, 2022-12-29 at 10:27 +0200, mlevitsk@redhat.com wrote:
> On Fri, 2022-12-09 at 00:00 +0200, Maxim Levitsky wrote:
> > On Sat, 2022-10-01 at 00:59 +0000, Sean Christopherson wrote:
> > > Do not modify AVIC's logical ID table if the logical ID portion of the
> > > LDR is not a power-of-2, i.e. if the LDR has multiple bits set.  Taking
> > > only the first bit means that KVM will fail to match MDAs that intersect
> > > with "higher" bits in the "ID"
> > > 
> > > The "ID" acts as a bitmap, but is referred to as an ID because theres an
> > > implicit, unenforced "requirement" that software only set one bit.  This
> > > edge case is arguably out-of-spec behavior, but KVM cleanly handles it
> > > in all other cases, e.g. the optimized logical map (and AVIC!) is also
> > > disabled in this scenario.
> > > 
> > > Refactor the code to consolidate the checks, and so that the code looks
> > > more like avic_kick_target_vcpus_fast().
> > > 
> > > Fixes: 18f40c53e10f ("svm: Add VMEXIT handlers for AVIC")
> > > Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> > > Cc: Maxim Levitsky <mlevitsk@redhat.com>
> > > Signed-off-by: Sean Christopherson <seanjc@google.com>
> > > ---
> > >  arch/x86/kvm/svm/avic.c | 30 +++++++++++++++---------------
> > >  1 file changed, 15 insertions(+), 15 deletions(-)
> > > 
> > > diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
> > > index 4b6fc9d64f4d..a9e4e09f83fc 100644
> > > --- a/arch/x86/kvm/svm/avic.c
> > > +++ b/arch/x86/kvm/svm/avic.c
> > > @@ -513,26 +513,26 @@ unsigned long avic_vcpu_get_apicv_inhibit_reasons(struct kvm_vcpu *vcpu)
> > >  static u32 *avic_get_logical_id_entry(struct kvm_vcpu *vcpu, u32 ldr, bool flat)
> > >  {
> > >  	struct kvm_svm *kvm_svm = to_kvm_svm(vcpu->kvm);
> > > -	int index;
> > >  	u32 *logical_apic_id_table;
> > > -	int dlid = GET_APIC_LOGICAL_ID(ldr);
> > > +	u32 cluster, index;
> > >  
> > > -	if (!dlid)
> > > -		return NULL;
> > > +	ldr = GET_APIC_LOGICAL_ID(ldr);
> > >  
> > > -	if (flat) { /* flat */
> > > -		index = ffs(dlid) - 1;
> > > -		if (index > 7)
> > > +	if (flat) {
> > > +		cluster = 0;
> > > +	} else {
> > > +		cluster = (ldr >> 4) << 2;
> > > +		if (cluster >= 0xf)
> > >  			return NULL;
> > > -	} else { /* cluster */
> > > -		int cluster = (dlid & 0xf0) >> 4;
> > > -		int apic = ffs(dlid & 0x0f) - 1;
> > > -
> > > -		if ((apic < 0) || (apic > 7) ||
> > > -		    (cluster >= 0xf))
> > > -			return NULL;
> > > -		index = (cluster << 2) + apic;
> > > +		ldr &= 0xf;
> > >  	}
> > > +	if (!ldr || !is_power_of_2(ldr))
> > > +		return NULL;
> > > +
> > > +	index = __ffs(ldr);
> > > +	if (WARN_ON_ONCE(index > 7))
> > > +		return NULL;
> > > +	index += (cluster << 2);
> > >  
> > >  	logical_apic_id_table = (u32 *) page_address(kvm_svm->avic_logical_id_table_page);
> > >  
> > 
> > Looks good.
> 
> I hate to say it but this patch has a bug:
> 
> We have both 'cluster = (ldr >> 4) << 2' and then 'index += (cluster << 2)'
> 
> One of the shifts has to go.


Sean, please don't forget to fix this isssue in the next patch series.
Best regards,
	Maxim Levitsky
> 
> Best regards,
> 	Maxim Levitsky
> 
> 
> > For future refactoring, I also suggest to rename this function to 'avic_get_logical_id_table_entry'
> > to stress the fact that it gets a pointer to the AVIC's data structure.
> > 
> > Same for 'avic_get_physical_id_entry'
> > 
> > And also while at it : the 'svm->avic_physical_id_cache', is a very misleading name,
> > 
> > It should be svm->avic_physical_id_table_entry_ptr with a comment explaining that
> > is is the pointer to physid table entry.
> > 
> > 
> > Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
> > 
> > 
> > 
> > Best regards,
> > 	Maxim Levitsky
> 
> 



  reply	other threads:[~2023-01-04 10:10 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-01  0:58 [PATCH v4 00/32] KVM: x86: AVIC and local APIC fixes+cleanups Sean Christopherson
2022-10-01  0:58 ` [PATCH v4 01/32] KVM: x86: Blindly get current x2APIC reg value on "nodecode write" traps Sean Christopherson
2022-12-08 21:47   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 02/32] KVM: x86: Purge "highest ISR" cache when updating APICv state Sean Christopherson
2022-12-08 21:47   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 03/32] KVM: SVM: Flush the "current" TLB when activating AVIC Sean Christopherson
     [not found]   ` <b9f336f17eec6bfbb8429700e0f135d19813c576.camel@redhat.com>
2022-12-08 21:52     ` Maxim Levitsky
2022-12-09  0:40       ` Sean Christopherson
2022-12-08 22:02     ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 04/32] KVM: SVM: Process ICR on AVIC IPI delivery failure due to invalid target Sean Christopherson
2022-10-01  0:58 ` [PATCH v4 05/32] KVM: x86: Don't inhibit APICv/AVIC on xAPIC ID "change" if APIC is disabled Sean Christopherson
2022-12-08 21:53   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 06/32] KVM: x86: Track xAPIC ID only on userspace SET, _after_ vAPIC is updated Sean Christopherson
2022-12-08 21:53   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 07/32] KVM: x86: Don't inhibit APICv/AVIC if xAPIC ID mismatch is due to 32-bit ID Sean Christopherson
2022-12-08 21:53   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 08/32] KVM: SVM: Don't put/load AVIC when setting virtual APIC mode Sean Christopherson
2022-12-08 21:53   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 09/32] KVM: x86: Handle APICv updates for APIC "mode" changes via request Sean Christopherson
2022-12-08 21:54   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 10/32] KVM: x86: Move APIC access page helper to common x86 code Sean Christopherson
2022-12-08 21:55   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 11/32] KVM: x86: Inhibit APIC memslot if x2APIC and AVIC are enabled Sean Christopherson
2022-12-08 21:56   ` Maxim Levitsky
2022-12-16 19:03     ` Sean Christopherson
2022-12-16 19:40       ` Sean Christopherson
2022-12-27 11:25         ` Paolo Bonzini
2023-01-03 16:30           ` Sean Christopherson
2022-10-01  0:58 ` [PATCH v4 12/32] KVM: SVM: Replace "avic_mode" enum with "x2avic_enabled" boolean Sean Christopherson
2022-10-01  0:58 ` [PATCH v4 13/32] KVM: SVM: Compute dest based on sender's x2APIC status for AVIC kick Sean Christopherson
2022-10-01  0:58 ` [PATCH v4 14/32] KVM: SVM: Fix x2APIC Logical ID calculation for avic_kick_target_vcpus_fast Sean Christopherson
2022-10-01  0:58 ` [PATCH v4 15/32] Revert "KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible" Sean Christopherson
2022-12-08 21:56   ` Maxim Levitsky
2022-10-01  0:58 ` [PATCH v4 16/32] KVM: SVM: Document that vCPU ID == APIC ID in AVIC kick fastpatch Sean Christopherson
2022-10-01  0:59 ` [PATCH v4 17/32] KVM: SVM: Add helper to perform final AVIC "kick" of single vCPU Sean Christopherson
2022-10-01  0:59 ` [PATCH v4 18/32] KVM: x86: Explicitly skip optimized logical map setup if vCPU's LDR==0 Sean Christopherson
2022-12-08 21:56   ` Maxim Levitsky
2022-10-01  0:59 ` [PATCH v4 19/32] KVM: x86: Explicitly track all possibilities for APIC map's logical modes Sean Christopherson
2022-12-08 21:57   ` Maxim Levitsky
2022-12-16 18:39     ` Sean Christopherson
2022-12-16 23:34       ` Sean Christopherson
2022-12-27 11:30         ` Paolo Bonzini
2022-10-01  0:59 ` [PATCH v4 20/32] KVM: x86: Skip redundant x2APIC logical mode optimized cluster setup Sean Christopherson
2022-12-08 21:57   ` Maxim Levitsky
2022-10-01  0:59 ` [PATCH v4 21/32] KVM: x86: Disable APIC logical map if logical ID covers multiple MDAs Sean Christopherson
2022-10-01  0:59 ` [PATCH v4 22/32] KVM: x86: Disable APIC logical map if vCPUs are aliased in logical mode Sean Christopherson
2022-10-01  0:59 ` [PATCH v4 23/32] KVM: x86: Honor architectural behavior for aliased 8-bit APIC IDs Sean Christopherson
2022-12-08 21:58   ` Maxim Levitsky
2022-10-01  0:59 ` [PATCH v4 24/32] KVM: x86: Inhibit APICv/AVIC if the optimized physical map is disabled Sean Christopherson
2022-12-08 21:58   ` Maxim Levitsky
2022-12-09  0:56     ` Sean Christopherson
2022-10-01  0:59 ` [PATCH v4 25/32] KVM: SVM: Inhibit AVIC if vCPUs are aliased in logical mode Sean Christopherson
2022-12-08 21:58   ` Maxim Levitsky
2022-10-01  0:59 ` [PATCH v4 26/32] KVM: SVM: Always update local APIC on writes to logical dest register Sean Christopherson
2022-12-08 21:58   ` Maxim Levitsky
2022-10-01  0:59 ` [PATCH v4 27/32] KVM: SVM: Update svm->ldr_reg cache even if LDR is "bad" Sean Christopherson
2022-12-08 21:59   ` Maxim Levitsky
2022-12-09  0:49     ` Sean Christopherson
2022-10-01  0:59 ` [PATCH v4 28/32] KVM: SVM: Require logical ID to be power-of-2 for AVIC entry Sean Christopherson
2022-12-08 22:00   ` Maxim Levitsky
2022-12-29  8:27     ` mlevitsk
2023-01-04 10:08       ` Maxim Levitsky [this message]
2023-01-04 18:02       ` Sean Christopherson
2023-01-04 18:34         ` Maxim Levitsky
2022-10-01  0:59 ` [PATCH v4 29/32] KVM: SVM: Handle multiple logical targets in AVIC kick fastpath Sean Christopherson
2022-12-08 22:00   ` Maxim Levitsky
2022-10-01  0:59 ` [PATCH v4 30/32] KVM: SVM: Ignore writes to Remote Read Data on AVIC write traps Sean Christopherson
2022-10-01  0:59 ` [PATCH v4 31/32] Revert "KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu" Sean Christopherson
2022-12-08 22:01   ` Maxim Levitsky
2022-10-01  0:59 ` [PATCH v4 32/32] KVM: x86: Track required APICv inhibits with variable, not callback Sean Christopherson
2022-12-08 22:03   ` Maxim Levitsky
2022-12-27 11:22 ` [PATCH v4 00/32] KVM: x86: AVIC and local APIC fixes+cleanups Paolo Bonzini

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