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X-CSE-ConnectionGUID: XrZ4ofxuTBu7WWeRP3PdDw== X-CSE-MsgGUID: rJARdT0VRCu1s76C2Z947A== X-IronPort-AV: E=McAfee;i="6800,10657,11460"; a="62369831" X-IronPort-AV: E=Sophos;i="6.16,227,1744095600"; d="scan'208";a="62369831" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2025 23:39:03 -0700 X-CSE-ConnectionGUID: DsQHjbLuSO648jA2TLRxig== X-CSE-MsgGUID: MDdkl/NoTtOo2vUEa0P1gQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,227,1744095600"; d="scan'208";a="150921102" Received: from unknown (HELO [10.238.0.239]) ([10.238.0.239]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2025 23:39:01 -0700 Message-ID: Date: Wed, 11 Jun 2025 14:38:58 +0800 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/32] KVM: x86: Use non-atomic bit ops to manipulate "shadow" MSR intercepts To: Sean Christopherson Cc: Paolo Bonzini , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Chao Gao , Borislav Petkov , Xin Li , Dapeng Mi , Francesco Lavra , Manali Shukla References: <20250610225737.156318-1-seanjc@google.com> <20250610225737.156318-8-seanjc@google.com> Content-Language: en-US From: Binbin Wu In-Reply-To: <20250610225737.156318-8-seanjc@google.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 6/11/2025 6:57 AM, Sean Christopherson wrote: > Manipulate the MSR bitmaps using non-atomic bit ops APIs (two underscores), > as the bitmaps are per-vCPU and are only ever accessed while vcpu->mutex is > held. > > Signed-off-by: Sean Christopherson Reviewed-by: Binbin Wu > --- > arch/x86/kvm/svm/svm.c | 12 ++++++------ > arch/x86/kvm/vmx/vmx.c | 8 ++++---- > 2 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > index 7e39b9df61f1..ec97ea1d7b38 100644 > --- a/arch/x86/kvm/svm/svm.c > +++ b/arch/x86/kvm/svm/svm.c > @@ -789,14 +789,14 @@ static void set_shadow_msr_intercept(struct kvm_vcpu *vcpu, u32 msr, int read, > > /* Set the shadow bitmaps to the desired intercept states */ > if (read) > - set_bit(slot, svm->shadow_msr_intercept.read); > + __set_bit(slot, svm->shadow_msr_intercept.read); > else > - clear_bit(slot, svm->shadow_msr_intercept.read); > + __clear_bit(slot, svm->shadow_msr_intercept.read); > > if (write) > - set_bit(slot, svm->shadow_msr_intercept.write); > + __set_bit(slot, svm->shadow_msr_intercept.write); > else > - clear_bit(slot, svm->shadow_msr_intercept.write); > + __clear_bit(slot, svm->shadow_msr_intercept.write); > } > > static bool valid_msr_intercept(u32 index) > @@ -862,8 +862,8 @@ static void set_msr_interception_bitmap(struct kvm_vcpu *vcpu, u32 *msrpm, > bit_write = 2 * (msr & 0x0f) + 1; > tmp = msrpm[offset]; > > - read ? clear_bit(bit_read, &tmp) : set_bit(bit_read, &tmp); > - write ? clear_bit(bit_write, &tmp) : set_bit(bit_write, &tmp); > + read ? __clear_bit(bit_read, &tmp) : __set_bit(bit_read, &tmp); > + write ? __clear_bit(bit_write, &tmp) : __set_bit(bit_write, &tmp); > > msrpm[offset] = tmp; > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 9ff00ae9f05a..8f7fe04a1998 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -4029,9 +4029,9 @@ void vmx_disable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) > idx = vmx_get_passthrough_msr_slot(msr); > if (idx >= 0) { > if (type & MSR_TYPE_R) > - clear_bit(idx, vmx->shadow_msr_intercept.read); > + __clear_bit(idx, vmx->shadow_msr_intercept.read); > if (type & MSR_TYPE_W) > - clear_bit(idx, vmx->shadow_msr_intercept.write); > + __clear_bit(idx, vmx->shadow_msr_intercept.write); > } > > if ((type & MSR_TYPE_R) && > @@ -4071,9 +4071,9 @@ void vmx_enable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) > idx = vmx_get_passthrough_msr_slot(msr); > if (idx >= 0) { > if (type & MSR_TYPE_R) > - set_bit(idx, vmx->shadow_msr_intercept.read); > + __set_bit(idx, vmx->shadow_msr_intercept.read); > if (type & MSR_TYPE_W) > - set_bit(idx, vmx->shadow_msr_intercept.write); > + __set_bit(idx, vmx->shadow_msr_intercept.write); > } > > if (type & MSR_TYPE_R)