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AFNElJ/M+m29PaEjW82K5lnf/Lj5JN579bXxOFcyJ9+BOeTJjfAf3Al7vCmHwb0vvFJwKQK/jRI=@vger.kernel.org X-Gm-Message-State: AOJu0Yz4bnLF1bgTFO0xNxGpphmUPz4PR53F2ob7NupVdrLLHchWjfO/ g1V5rVPEyeG3Bq9DDo+d3bnqjiLGOKs+yKVbN0Fdw9wi2/Nwv4zp+SKqXGDY6y8hImzUGZh2UcY jX25pXQ== X-Received: from pfbde16.prod.google.com ([2002:a05:6a00:4690:b0:82f:5aef:db75]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:9083:b0:82c:b808:4c59 with SMTP id d2e1a72fcca58-82f0c2e6c46mr19583002b3a.46.1776206988555; Tue, 14 Apr 2026 15:49:48 -0700 (PDT) Date: Tue, 14 Apr 2026 15:49:47 -0700 In-Reply-To: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260414191425.2697918-1-seanjc@google.com> <20260414191425.2697918-3-seanjc@google.com> Message-ID: Subject: Re: [PATCH 2/4] perf/x86/intel: Don't context switch DS_AREA (and PEBS config) if PEBS is unused From: Sean Christopherson To: Jim Mattson Cc: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, Paolo Bonzini , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Mingwei Zhang , Stephane Eranian , Dapeng Mi Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Tue, Apr 14, 2026, Jim Mattson wrote: > On Tue, Apr 14, 2026 at 12:14=E2=80=AFPM Sean Christopherson wrote: > > @@ -5065,6 +5056,28 @@ static struct perf_guest_switch_msr *intel_guest= _get_msrs(int *nr, void *data) > > if (pebs_mask & ~cpuc->intel_ctrl_guest_mask) > > guest_pebs_mask =3D 0; > > > > + /* > > + * Context switch DS_AREA and PEBS_DATA_CFG if and only if PEBS= will be > > + * active in the guest; if no records will be generated while t= he guest > > + * is running, then running with host values is safe (see above= ). > > + */ > > + if (!guest_pebs_mask) > > + return arr; >=20 > I think this has an unintended side effect. If DS_AREA and > PEBS_DATA_CFG were previously listed (because pebs_guest_mask was > previously non-zero), KVM will leave the stale entries in the MSR-load > lists. >=20 > KVM only clears MSR-load list entries for enumerated MSRs with > matching guest and host values. Argh, right. This as a delta change I guess? I'd love to overhaul the int= erface, but reworking KVM to play nice with core_guest_get_msrs() would be much mor= e difficult. diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 20a153aa33cb..3244d5589981 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -5059,22 +5059,20 @@ static struct perf_guest_switch_msr *intel_guest_ge= t_msrs(int *nr, void *data) /* * Context switch DS_AREA and PEBS_DATA_CFG if and only if PEBS wil= l be * active in the guest; if no records will be generated while the g= uest - * is running, then running with host values is safe (see above). + * is running, then simply keep the host values resident in hardwar= e. */ - if (!guest_pebs_mask) - return arr; - arr[(*nr)++] =3D (struct perf_guest_switch_msr){ .msr =3D MSR_IA32_DS_AREA, .host =3D (unsigned long)cpuc->ds, - .guest =3D kvm_pmu->ds_area, + .guest =3D guest_pebs_mask ? kvm_pmu->ds_area : (unsigned l= ong)cpuc->ds, }; =20 if (x86_pmu.intel_cap.pebs_baseline) { arr[(*nr)++] =3D (struct perf_guest_switch_msr){ .msr =3D MSR_PEBS_DATA_CFG, .host =3D cpuc->active_pebs_data_cfg, - .guest =3D kvm_pmu->pebs_data_cfg, + .guest =3D guest_pebs_mask ? kvm_pmu->data_cfg : + cpuc->active_pebs_data_c= fg, }; } =20