From: Roland Dreier <rdreier@cisco.com>
To: "Zhao\, Yu" <yu.zhao@intel.com>
Cc: "linux-pci\@vger.kernel.org" <linux-pci@vger.kernel.org>,
Jesse Barnes <jbarnes@virtuousgeek.org>,
Randy Dunlap <randy.dunlap@oracle.com>,
Grant Grundler <grundler@parisc-linux.org>,
Alex Chiang <achiang@hp.com>, Matthew Wilcox <matthew@wil.cx>,
Greg KH <greg@kroah.com>,
"linux-kernel\@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm\@vger.kernel.org" <kvm@vger.kernel.org>,
"virtualization\@lists.linux-foundation.org"
<virtualization@lists.linux-foundation.org>
Subject: Re: [PATCH 4/6 v3] PCI: support SR-IOV capability
Date: Tue, 30 Sep 2008 15:40:15 -0700 [thread overview]
Message-ID: <ada3ajhfeb4.fsf@cisco.com> (raw)
In-Reply-To: <D8078B8B3B09934AA9F8F2D5FB3F28CE088751B5F4@pdsmsx502.ccr.corp.intel.com> (Yu Zhao's message of "Sat, 27 Sep 2008 16:28:15 +0800")
> + ctrl = pci_ari_enabled(dev) ? PCI_IOV_CTRL_ARI : 0;
> + pci_write_config_word(dev, pos + PCI_IOV_CTRL, ctrl);
> + ssleep(1);
You seem to sleep for 1 second wherever you write the IOV_CTRL
register. Why is this? Is this specified by PCI, or is it coming from
somewhere else?
- R.
next prev parent reply other threads:[~2008-09-30 22:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-27 8:28 [PATCH 4/6 v3] PCI: support SR-IOV capability Zhao, Yu
2008-09-30 22:38 ` Alex Chiang
2008-10-10 7:24 ` Zhao, Yu
2008-09-30 22:40 ` Roland Dreier [this message]
2008-10-08 2:49 ` Zhao, Yu
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