From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Zide Chen <zide.chen@intel.com>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
Paolo Bonzini <pbonzini@redhat.com>,
Zhao Liu <zhao1.liu@intel.com>, Peter Xu <peterx@redhat.com>,
Fabiano Rosas <farosas@suse.de>
Cc: Xiaoyao Li <xiaoyao.li@intel.com>,
Dongli Zhang <dongli.zhang@oracle.com>
Subject: Re: [PATCH V2 08/11] target/i386: Clean up LBR format handling
Date: Tue, 10 Feb 2026 15:07:47 +0800 [thread overview]
Message-ID: <aebb7e2a-9690-45d2-8410-3d27bb3fa715@linux.intel.com> (raw)
In-Reply-To: <20260128231003.268981-9-zide.chen@intel.com>
On 1/29/2026 7:09 AM, Zide Chen wrote:
> Since the lbr-fmt property is masked with PERF_CAP_LBR_FMT in
> DEFINE_PROP_UINT64_CHECKMASK(), there is no need to explicitly validate
> user-requested lbr-fmt values.
>
> The PMU feature is only supported when running under KVM, so initialize
> cpu->lbr_fmt in kvm_cpu_instance_init(). Use -1 as the default lbr-fmt,
> rather than initializing it with ~PERF_CAP_LBR_FMT, which is misleading
> as it suggests a semantic relationship that does not exist.
>
> Rename requested_lbr_fmt to a more generic guest_fmt. When lbr-fmt is
> not specified and cpu->migratable is false, the guest lbr_fmt value is
> not user-requested.
>
> Signed-off-by: Zide Chen <zide.chen@intel.com>
> ---
> V2:
> - New patch.
>
> target/i386/cpu.c | 18 ++++++------------
> target/i386/kvm/kvm-cpu.c | 2 ++
> 2 files changed, 8 insertions(+), 12 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index f2c83b4f259c..09180c718d58 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -9788,7 +9788,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
> X86CPUClass *xcc = X86_CPU_GET_CLASS(dev);
> CPUX86State *env = &cpu->env;
> Error *local_err = NULL;
> - unsigned requested_lbr_fmt;
> + unsigned guest_fmt;
>
> if (!kvm_enabled())
> cpu->enable_pmu = false;
> @@ -9828,11 +9828,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
> * Override env->features[FEAT_PERF_CAPABILITIES].LBR_FMT
> * with user-provided setting.
> */
> - if (cpu->lbr_fmt != ~PERF_CAP_LBR_FMT) {
> - if ((cpu->lbr_fmt & PERF_CAP_LBR_FMT) != cpu->lbr_fmt) {
> - error_setg(errp, "invalid lbr-fmt");
> - return;
> - }
> + if (cpu->lbr_fmt != -1) {
> env->features[FEAT_PERF_CAPABILITIES] &= ~PERF_CAP_LBR_FMT;
> env->features[FEAT_PERF_CAPABILITIES] |= cpu->lbr_fmt;
> }
> @@ -9841,9 +9837,8 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
> * vPMU LBR is supported when 1) KVM is enabled 2) Option pmu=on and
> * 3)vPMU LBR format matches that of host setting.
> */
> - requested_lbr_fmt =
> - env->features[FEAT_PERF_CAPABILITIES] & PERF_CAP_LBR_FMT;
> - if (requested_lbr_fmt && kvm_enabled()) {
> + guest_fmt = env->features[FEAT_PERF_CAPABILITIES] & PERF_CAP_LBR_FMT;
> + if (guest_fmt) {
> uint64_t host_perf_cap =
> x86_cpu_get_supported_feature_word(NULL, FEAT_PERF_CAPABILITIES);
> unsigned host_lbr_fmt = host_perf_cap & PERF_CAP_LBR_FMT;
> @@ -9852,10 +9847,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
> error_setg(errp, "vPMU: LBR is unsupported without pmu=on");
> return;
> }
> - if (requested_lbr_fmt != host_lbr_fmt) {
> + if (guest_fmt != host_lbr_fmt) {
> error_setg(errp, "vPMU: the lbr-fmt value (0x%x) does not match "
> "the host value (0x%x).",
> - requested_lbr_fmt, host_lbr_fmt);
> + guest_fmt, host_lbr_fmt);
> return;
> }
> }
> @@ -10279,7 +10274,6 @@ static void x86_cpu_initfn(Object *obj)
> object_property_add_alias(obj, "sse4_2", obj, "sse4.2");
>
> object_property_add_alias(obj, "hv-apicv", obj, "hv-avic");
> - cpu->lbr_fmt = ~PERF_CAP_LBR_FMT;
> object_property_add_alias(obj, "lbr_fmt", obj, "lbr-fmt");
>
> if (xcc->model) {
> diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
> index 33a8c26bc27c..b4500ab69f82 100644
> --- a/target/i386/kvm/kvm-cpu.c
> +++ b/target/i386/kvm/kvm-cpu.c
> @@ -231,6 +231,8 @@ static void kvm_cpu_instance_init(CPUState *cs)
> kvm_cpu_max_instance_init(cpu);
> }
>
> + cpu->lbr_fmt = -1;
> +
> kvm_cpu_xsave_init();
> }
>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
next prev parent reply other threads:[~2026-02-10 7:07 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 23:09 [PATCH V2 00/11] target/i386: Misc PMU, PEBS, and MSR fixes and improvements Zide Chen
2026-01-28 23:09 ` [PATCH V2 01/11] target/i386: Disable unsupported BTS for guest Zide Chen
2026-02-10 6:31 ` Mi, Dapeng
2026-02-11 6:14 ` Xiaoyao Li
2026-03-04 18:22 ` Chen, Zide
2026-01-28 23:09 ` [PATCH V2 02/11] target/i386: Don't save/restore PERF_GLOBAL_OVF_CTRL MSR Zide Chen
2026-01-28 23:09 ` [PATCH V2 03/11] target/i386: Gate enable_pmu on kvm_enabled() Zide Chen
2026-01-28 23:09 ` [PATCH V2 04/11] target/i386: Support full-width writes for perf counters Zide Chen
2026-01-28 23:09 ` [PATCH V2 05/11] target/i386: Increase MSR_BUF_SIZE and split KVM_[GET/SET]_MSRS calls Zide Chen
2026-02-10 6:57 ` Mi, Dapeng
2026-02-10 17:23 ` Chen, Zide
2026-01-28 23:09 ` [PATCH V2 06/11] target/i386: Save/Restore DS based PEBS specfic MSRs Zide Chen
2026-01-28 23:09 ` [PATCH V2 07/11] target/i386: Make some PEBS features user-visible Zide Chen
2026-02-10 7:02 ` Mi, Dapeng
2026-01-28 23:09 ` [PATCH V2 08/11] target/i386: Clean up LBR format handling Zide Chen
2026-02-10 7:07 ` Mi, Dapeng [this message]
2026-01-28 23:09 ` [PATCH V2 09/11] target/i386: Refactor " Zide Chen
2026-02-10 7:14 ` Mi, Dapeng
2026-01-28 23:09 ` [PATCH V2 10/11] target/i386: Add pebs-fmt CPU option Zide Chen
2026-01-28 23:09 ` [PATCH V2 11/11] target/i386: Disable guest PEBS capability when not enabled Zide Chen
2026-02-10 7:30 ` Mi, Dapeng
2026-02-10 19:05 ` Chen, Zide
2026-02-11 1:20 ` Mi, Dapeng
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