From: Zhao Liu <zhao1.liu@intel.com>
To: Zide Chen <zide.chen@intel.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
Paolo Bonzini <pbonzini@redhat.com>, Peter Xu <peterx@redhat.com>,
Fabiano Rosas <farosas@suse.de>,
Sandipan Das <sandipan.das@amd.com>,
Xiaoyao Li <xiaoyao.li@intel.com>,
Dongli Zhang <dongli.zhang@oracle.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Zhao Liu <zhao1.liu@intel.com>
Subject: Re: [PATCH V3 01/13] target/i386: Disable unsupported BTS for guest
Date: Wed, 22 Apr 2026 18:07:13 +0800 [thread overview]
Message-ID: <aeid0QluufANcH59@intel.com> (raw)
In-Reply-To: <20260304180713.360471-2-zide.chen@intel.com>
On Wed, Mar 04, 2026 at 10:07:00AM -0800, Zide Chen wrote:
> Date: Wed, 4 Mar 2026 10:07:00 -0800
> From: Zide Chen <zide.chen@intel.com>
> Subject: [PATCH V3 01/13] target/i386: Disable unsupported BTS for guest
> X-Mailer: git-send-email 2.53.0
>
> BTS (Branch Trace Store), enumerated by IA32_MISC_ENABLE.BTS_UNAVAILABLE
> (bit 11), is deprecated and has been superseded by LBR and Intel PT.
I'm not clear from which platform this bit will be set by default?
> KVM yields control of this bit to userspace since KVM commit
> 9fc222967a39 ("KVM: x86: Give host userspace full control of
> MSR_IA32_MISC_ENABLES").
If KVM won't support it, it's better to only configure for KVM.
> However, QEMU does not set this bit, which allows guests to write the
> BTS and BTINT bits in IA32_DEBUGCTL. Since KVM doesn't support BTS,
> this may lead to unexpected MSR access errors.
But overall, this way is a bit user-unfriendly. For cases where CPUID
is unavailable, it would be more proper to check the KVM API to
determine whether support is available; making this change in userspace
feels a bit like applying the special patch for a corner case.
I found there's another patch where Paolo and Sean didn't want to make
such changes directly earlier on....
https://lore.kernel.org/qemu-devel/20220718032206.34488-1-zhenzhong.duan@intel.com/
Thanks,
Zhao
next prev parent reply other threads:[~2026-04-22 9:39 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-04 18:06 [PATCH V3 00/13] target/i386: Misc PMU fixes and enabling Zide Chen
2026-03-04 18:07 ` [PATCH V3 01/13] target/i386: Disable unsupported BTS for guest Zide Chen
2026-04-22 10:07 ` Zhao Liu [this message]
2026-03-04 18:07 ` [PATCH V3 02/13] target/i386: Don't save/restore PERF_GLOBAL_OVF_CTRL MSRs Zide Chen
2026-03-04 18:07 ` [PATCH V3 03/13] target/i386: Gate enable_pmu on kvm_enabled() Zide Chen
2026-03-04 18:07 ` [PATCH V3 04/13] target/i386: Adjust maximum number of PMU counters Zide Chen
2026-03-06 3:02 ` Mi, Dapeng
2026-03-04 18:07 ` [PATCH V3 05/13] target/i386: Support full-width writes for perf counters Zide Chen
2026-03-04 18:07 ` [PATCH V3 06/13] target/i386: Increase MSR_BUF_SIZE and split KVM_[GET/SET]_MSRS calls Zide Chen
2026-03-06 3:09 ` Mi, Dapeng
2026-03-04 18:07 ` [PATCH V3 07/13] target/i386: Add get/set/migrate support for legacy PEBS MSRs Zide Chen
2026-03-06 3:17 ` Mi, Dapeng
2026-03-04 18:07 ` [PATCH V3 08/13] target/i386: Make some PEBS features user-visible Zide Chen
2026-03-06 3:25 ` Mi, Dapeng
2026-03-04 18:07 ` [PATCH V3 09/13] target/i386: Clean up LBR format handling Zide Chen
2026-03-04 18:07 ` [PATCH V3 10/13] target/i386: Refactor " Zide Chen
2026-03-04 18:07 ` [PATCH V3 11/13] target/i386: Add pebs-fmt CPU option Zide Chen
2026-03-06 5:23 ` Mi, Dapeng
2026-04-22 8:21 ` Zhao Liu
2026-03-04 18:07 ` [PATCH V3 12/13] target/i386: Clean up Intel Debug Store feature dependencies Zide Chen
2026-03-06 5:34 ` Mi, Dapeng
2026-03-16 3:21 ` Chenyi Qiang
2026-03-16 6:57 ` Xiaoyao Li
2026-03-16 18:17 ` Chen, Zide
2026-03-16 18:17 ` Chen, Zide
2026-03-04 18:07 ` [PATCH V3 13/13] target/i386: Add Topdown metrics feature support Zide Chen
2026-03-06 5:37 ` Mi, Dapeng
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