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AFNElJ/aZ1GCtGvY7iP3JzekY8zz5qsgHUFFsRBwOWhGabIlW7EtHdHl28PKWRw+2poc5FXuv9I=@vger.kernel.org X-Gm-Message-State: AOJu0YxrxI5otu8VFC17Z58n25qdz/q+S16mwbptenIf2jR9WSqmIcO1 xaSYIDJhHvrGjDYdSqFMzVGpX9+y3mBzPkr3NpYTTBBPebXlDl/Jjogk3+9DHv30M7VVkYPBEnI dMHZoXw== X-Received: from pfbbe14.prod.google.com ([2002:a05:6a00:1f0e:b0:835:4315:3453]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:e83:b0:839:f1c0:13ce with SMTP id d2e1a72fcca58-839f1c017e1mr1930434b3a.40.1778004663397; Tue, 05 May 2026 11:11:03 -0700 (PDT) Date: Tue, 5 May 2026 11:11:02 -0700 In-Reply-To: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260430202750.3924147-1-yosry@kernel.org> <20260430202750.3924147-8-yosry@kernel.org> Message-ID: Subject: Re: [PATCH v5 07/13] KVM: x86/pmu: Disable counters based on Host-Only/Guest-Only bits in SVM From: Sean Christopherson To: Yosry Ahmed Cc: Paolo Bonzini , Jim Mattson , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Fri, May 01, 2026, Yosry Ahmed wrote: > On Thu, Apr 30, 2026 at 08:34:59PM -0700, Yosry Ahmed wrote: > > On Thu, Apr 30, 2026 at 4:24=E2=80=AFPM Yosry Ahmed = wrote: > > > > +static void amd_mediated_pmu_handle_host_guest_bits(struct kvm_vcp= u *vcpu, > > > > + struct kvm_pmc = *pmc) > > > > +{ > > > > + u64 host_guest_bits; > > > > + > > > > + if (!(pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE)) > > > > + return; > > > > + > > > > + /* Count all events if both bits are cleared */ > > > > + host_guest_bits =3D pmc->eventsel & AMD64_EVENTSEL_HOST_GUE= ST_MASK; > > > > + if (!host_guest_bits) > > > > + return; > > > > + > > > > + /* > > > > + * If EFER.SVME is set, the counter is disabledd if only on= e of the bits > > > > + * is set and it doesn't match the vCPU context. If EFER.SV= ME is > > > > + * cleared, the counter is disable if any of the bits is se= t. > > > > + */ > > > > + if (vcpu->arch.efer & EFER_SVME) { > > > > + if (host_guest_bits =3D=3D AMD64_EVENTSEL_HOST_GUES= T_MASK) > > > > + return; > > > > + > > > > + if (!!(host_guest_bits & AMD64_EVENTSEL_GUESTONLY) = =3D=3D is_guest_mode(vcpu)) > > > > + return; > > > > + } > > > > + > > > > + pmc->eventsel_hw &=3D ~ARCH_PERFMON_EVENTSEL_ENABLE; > > > > > > Sashiko raised a good point here. In the following patch, we reprogra= m > > > the counters synchronously on nested transitions to update the > > > counters' enablement before counting VMRUN or WRMSR(EFER.SVME). > > > However, this updates pmc->eventsel_hw while > > > kvm_pmu_recalc_pmc_emulation() checks pmc->eventsel to check if the > > > counter is enabled. > > > > > > I think either pmc_is_locally_enabled() needs to check > > > pmc->eventsel_hw or we need to update pmc->eventsel here. Hmm. I don't think either of those is the correct approach. Unlike the MS= R filter case, the H/G stuff is architectural. I.e. KVM doesn't just need to disabl= e the counter in hardware, KVM _always_ needs to treat the counter as disabled. So I think we actually want to handle this in pmc_is_locally_enabled(), bec= ause the host/guest bits are "local" controls. One option would be to add the g= uest/host masks as constants in kvm_pmu_ops, and bleed the logic into pmc_is_locally_= enabled(), e.g. to avoid the CALL+RET overhead. But if make the callback a "negative"= , then we can make the static call OPTIONAL_RET0, which will turn the call into a = glorified nop for everything except AMD with a mediated PMU. E.g. diff --git arch/x86/kvm/pmu.h arch/x86/kvm/pmu.h index 0925246731cb..d8ce0938fcbe 100644 --- arch/x86/kvm/pmu.h +++ arch/x86/kvm/pmu.h @@ -190,7 +190,8 @@ static inline bool pmc_is_locally_enabled(struct kvm_pm= c *pmc) pmc->idx - KVM_FIXED_PMC_BASE_IDX) = & (INTEL_FIXED_0_KERNEL | INTEL_FIXED= _0_USER); =20 - return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE; + return (pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE) && + !kvm_pmu_call(pmc_is_locally_disabled(pmc)); } =20 extern struct x86_pmu_capability kvm_pmu_cap;