Kernel KVM virtualization development
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From: Naveen N Rao <naveen@kernel.org>
To: Sean Christopherson <seanjc@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org,  linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/3] KVM: x86: Add dedicated API for getting mask of accelerated x2APIC MSRs
Date: Fri, 15 May 2026 19:48:20 +0530	[thread overview]
Message-ID: <agcqzZnsYiN2BP6T@blrnaveerao1> (raw)
In-Reply-To: <20260514213115.1637082-2-seanjc@google.com>

On Thu, May 14, 2026 at 02:31:13PM -0700, Sean Christopherson wrote:
> Add a dedicated local APIC API, kvm_x2apic_disable_intercept_reg_mask(),
> to provide the mask of x2APIC registers whose MSRs can and should be passed
> through to the guest when x2APIC virtualization is enable, and use it in
> lieu of the open-coded equivalent VMX logic.  Providing a common helper
> will allow sharing the logic with SVM (x2AVIC), and as a bonus eliminates
> the somewhat confusing code where KVM enables interception for MSR_TYPE_RW,
> even though only the READ case actually needs to be updated.

I thought you discarded this patch based on your response to v2. I now 
realize you were only referring to not unifying the WRMSR interception 
paths (d'uh!)

This LGTM.
Reviewed-by: Naveen N Rao (AMD) <naveen@kernel.org>


Thanks,
Naveen


  reply	other threads:[~2026-05-15 14:23 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-14 21:31 [PATCH v3 0/3] KVM: SVM: Fix x2AVIC MSR interception issues Sean Christopherson
2026-05-14 21:31 ` [PATCH v3 1/3] KVM: x86: Add dedicated API for getting mask of accelerated x2APIC MSRs Sean Christopherson
2026-05-15 14:18   ` Naveen N Rao [this message]
2026-05-14 21:31 ` [PATCH v3 2/3] KVM: SVM: Disable x2AVIC RDMSR interception for MSRs KVM actually supports Sean Christopherson
2026-05-15 14:19   ` Naveen N Rao
2026-05-14 21:31 ` [PATCH v3 3/3] KVM: SVM: Only disable x2AVIC WRMSR interception for MSRs that are accelerated Sean Christopherson

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