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Peter Anvin" , Rick Edgecombe , Kuppuswamy Sathyanarayanan , Kai Huang , Sean Christopherson , Borys Tsyrulnikov , linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v3 2/2] x86/tdx: Fix zero-extension for 32-bit port I/O Message-ID: References: <20260527120544.2903923-1-kas@kernel.org> <20260527120544.2903923-3-kas@kernel.org> <5ed6121c-314e-4cf0-9a11-b0661c87c694@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5ed6121c-314e-4cf0-9a11-b0661c87c694@intel.com> On Wed, May 27, 2026 at 10:45:28AM -0700, Dave Hansen wrote: > On 5/27/26 05:05, Kiryl Shutsemau (Meta) wrote: > ... > > - /* Update part of the register affected by the emulated instruction */ > > - regs->ax &= ~mask; > > + /* > > + * IN writes the result into a sub-register of RAX. Only the > > + * 32-bit form zero-extends; the smaller forms leave the upper > > + * bits untouched: > > + * > > + * insn dest size bits written bits preserved > > + * inb AL 1 RAX[ 7: 0] RAX[63: 8] > > + * inw AX 2 RAX[15: 0] RAX[63:16] > > + * inl EAX 4 RAX[63: 0] (none, zero-extended) > > + * > > + * 'mask' only covers the low 'size' bytes, which is exactly the > > + * range affected for size 1 and 2. For size 4 the write also > > + * clears RAX[63:32], so widen the clear-mask. > > + */ > > + if (size == 4) > > + regs->ax = 0; > > + else > > + regs->ax &= ~mask; > > + > > Is there any way we could do this with fewer comments and more code? > > I mean, there's only three cases. Why have; > > u64 mask = GENMASK(BITS_PER_BYTE * size - 1, 0); > > When there are only 3 possible cases: > > 1 => 0xf > 2 => 0xff > 4 => 0xffff > > and one of those cases needs a special case on top of it. > > Maybe something like this? > > /* Clear out part of RAX so part of args.r11 can be OR'd in: */ > switch (size) { > case 1: > /* inb consumes lower 8 bits of r11: */ > regs->ax &= ~GENMASK_ULL(7, 0); > args.r11 &= GENMASK_ULL(7, 0); > break; > case 2: > /* inw consumes lower 16 bits of r11: */ > regs->ax &= ~GENMASK_ULL(15, 0); > args.r11 &= GENMASK_ULL(15, 0); > break; > case 4: > /* inl is weird and zeros the whole register: */ > regs->ax &= ~GENMASK_ULL(63, 0); > /* But only consumes 32-bits from r11: */ > args.r11 &= GENMASK_ULL(31, 0); > break; > default: > /* Probable TDX module bug. Illegal in[bwl] size: */ > WARN_ON_ONCE(1); > success = 0; > } > > if (success) > regs->ax |= args.r11; > > It might need a temporary variable for args.r11, but you get the point. > That's basically the data from the comment but written as code. I hate how verbose it is. All these GENMASK_ULL() make it hard to follow. What about the patch below. Inspired by kvm's assign_register(). diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index 65119362f9a2..460b9fbabf14 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -693,8 +693,8 @@ static bool handle_in(struct pt_regs *regs, int size, int port) .r13 = PORT_READ, .r14 = port, }; - u64 mask = GENMASK(BITS_PER_BYTE * size - 1, 0); bool success; + u32 val; /* * Emulate the I/O read via hypercall. More info about ABI can be found @@ -703,10 +703,33 @@ static bool handle_in(struct pt_regs *regs, int size, int port) */ success = !__tdx_hypercall(&args); - /* Update part of the register affected by the emulated instruction */ - regs->ax &= ~mask; if (success) - regs->ax |= args.r11 & mask; + val = args.r11; + else + val = 0; + + /* + * IN writes the result into a sub-register of RAX. + * + * Only the 32-bit form zero-extends; the smaller forms leave + * the upper bits untouched. + */ + switch (size) { + case 1: + *(u8 *)®s->ax = (u8)val; + break; + case 2: + *(u16 *)®s->ax = (u16)val; + break; + case 4: + /* zero-extended */ + regs->ax = val; + break; + default: + /* Probable TDX module bug. Illegal in[bwl] size. */ + WARN_ON_ONCE(1); + break; + } return success; } -- Kiryl Shutsemau / Kirill A. Shutemov