Re: [PATCH 2/2] KVM: nVMX: Don't use vmcs01.GUEST_CR3 to snapshot L1's CR3 when EPT is disabled

[Sean Christopherson <seanjc@google.com>]

On Wed, Jun 03, 2026, sashiko-bot@kernel.org wrote:
> > diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
> > --- a/arch/x86/kvm/vmx/nested.c
> > +++ b/arch/x86/kvm/vmx/nested.c
> > @@ -3651,19 +3651,14 @@ enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu,
> >  				    &vmx->nested.pre_vmenter_ssp_tbl);
> >  
> >  	/*
> > -	 * Overwrite vmcs01.GUEST_CR3 with L1's CR3 if EPT is disabled.  In the
> > -	 * event of a "late" VM-Fail, i.e. a VM-Fail detected by hardware but
> > -	 * not KVM, KVM must unwind its software model to the pre-VM-Entry host
> > -	 * state.  When EPT is disabled, GUEST_CR3 holds KVM's shadow CR3, not
> > -	 * L1's "real" CR3, which causes nested_vmx_restore_host_state() to
> > -	 * corrupt vcpu->arch.cr3.  Stuffing vmcs01.GUEST_CR3 results in the
> > -	 * unwind naturally setting arch.cr3 to the correct value.  Smashing
> > -	 * vmcs01.GUEST_CR3 is safe because nested VM-Exits, and the unwind,
> > -	 * reset KVM's MMU, i.e. vmcs01.GUEST_CR3 is guaranteed to be
> > -	 * overwritten with a shadow CR3 prior to re-entering L1.
> > +	 * Stash L1's CR3, so that in the event of a "late" VM-Fail, i.e. a
> > +	 * VM-Fail detected by hardware but not KVM, KVM can unwind its
> > +	 * software model to the pre-VM-Entry host state.  When EPT is
> > +	 * disabled, GUEST_CR3 holds KVM's shadow CR3, not L1's "real" CR3,
> > +	 * and so simply restoring from vmcs01.GUEST_CR3 would corrupt
> > +	 * vcpu->arch.cr3.
> >  	 */
> > -	if (!enable_ept)
> > -		vmcs_writel(GUEST_CR3, vcpu->arch.cr3);
> > +	vmx->nested.pre_vmenter_cr3 = vcpu->arch.cr3;
> 
> [Severity: High]
> Does directly reading vcpu->arch.cr3 here capture a stale value when EPT is
> enabled?
> 
> Because KVM does not intercept L1 CR3 writes when EPT is enabled, L1 can
> update its CR3 without KVM immediately tracking it. On VM-Exit (such as for
> VMLAUNCH), KVM invalidates the CR3 register cache by clearing the
> VCPU_REG_CR3 availability bit.
> 
> If nested_vmx_enter_non_root_mode() directly assigns vmx->nested.pre_vmenter_cr3
> from vcpu->arch.cr3 instead of using kvm_read_cr3(vcpu), it seems this would
> bypass the cache refresh and stash a stale CR3 value.

Gah, yes.