From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Gleixner Subject: Re: [PATCH 2/2] Device assignment: Fix MSI IRQ affinity setting Date: Thu, 24 May 2012 23:39:08 +0200 (CEST) Message-ID: References: <1337878924-39069-1-git-send-email-richard@nod.at> <1337878924-39069-2-git-send-email-richard@nod.at> <1337883627.4714.32.camel@ul30vt> Mime-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Cc: Richard Weinberger , kvm@vger.kernel.org, avi@redhat.com, Marcelo Tosatti , Bjorn Helgaas To: Alex Williamson Return-path: Received: from www.linutronix.de ([62.245.132.108]:58863 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965697Ab2EXVjL (ORCPT ); Thu, 24 May 2012 17:39:11 -0400 In-Reply-To: <1337883627.4714.32.camel@ul30vt> Sender: kvm-owner@vger.kernel.org List-ID: On Thu, 24 May 2012, Alex Williamson wrote: > On Thu, 2012-05-24 at 18:02 +0100, Richard Weinberger wrote: > > + if (address == msi_start + PCI_MSI_DATA_32) > > + handle_cfg_write_msi(pci_dev, assigned_dev); > > Why didn't we just use range_covers_byte(address, len, pci_dev->msi_cap > + PCI_MSI_DATA_32) to start with? But how does this handle the enable > bit? The problem with the current implementation is that it only changes the routing if the msi entry goes from masked to unmasked state. Linux does not mask the entries on affinity changes and never did, neither for MSI nor for MSI-X. I know it's probably not according to the spec, but we can't fix that retroactively. Thanks, tglx