From: Chao Gao <chao.gao@intel.com>
To: Dongli Zhang <dongli.zhang@oracle.com>
Cc: <kvm@vger.kernel.org>, <seanjc@google.com>, <pbonzini@redhat.com>,
<joe.jin@oracle.com>
Subject: Re: [PATCH 1/1] KVM: x86: lapic: update apic_base and APIC ID together
Date: Wed, 19 Aug 2026 13:48:18 +0800 [thread overview]
Message-ID: <aoVDogaO_0IYZQwm@intel.com> (raw)
In-Reply-To: <20260818234238.618158-1-dongli.zhang@oracle.com>
On Tue, Aug 18, 2026 at 04:42:38PM -0700, Dongli Zhang wrote:
>The commit b2849bec936b ("KVM: VMX: Update SVI during runtime APICv
>activation") resolved the loss of EOI issue when apicv is activated after
>being inhibited at runtime. However, it does not resolve the cause of the
>runtime apicv inhibition.
Why lead with commit b2849bec936b? APICv is inhibited and re-activated for
other reasons regardless of the race below, so that fix is needed anyway. The
race is at best an orthogonal issue.
>
>The inhibition occurs because apic_base and the APIC ID are not updated
>together.
>
>Although commit 052c3b99cbc8 ("KVM: x86: Reinitialize xAPIC ID when
>userspace forces x2APIC => xAPIC") reinitializes the xAPIC ID to the
>vCPU ID when userspace forces the APIC to transition directly from x2APIC
>to xAPIC mode, the updates are not performed in a single transaction.
>
>If another thread calls kvm_recalculate_apic_map() during the window
>between updating apic_base and the APIC ID, kvm_recalculate_phys_map() may
>set xapic_id_mismatch and temporarily inhibit APICv.
So the goal is to avoid a _transient_ APICv inhibit in a corner case?
If so, please spell out in the changelog why it's worth fixing.
prev parent reply other threads:[~2026-08-19 5:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-18 23:42 [PATCH 1/1] KVM: x86: lapic: update apic_base and APIC ID together Dongli Zhang
2026-08-18 23:49 ` Dongli Zhang
2026-08-19 0:03 ` sashiko-bot
2026-08-19 5:48 ` Chao Gao [this message]
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