From: Sean Christopherson <seanjc@google.com>
To: Hao Zhang <hao_zhang_kdev@163.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>, kvm@vger.kernel.org
Subject: Re: [PATCH 1/2] KVM: nSVM: Restore L1's debug registers on nested VM-Exit
Date: Thu, 27 Aug 2026 06:43:17 -0700 [thread overview]
Message-ID: <apA-9UEveHuHhKkV@google.com> (raw)
In-Reply-To: <ao_Ms5alWwKa30U8@192.168.1.215>
On Thu, Aug 27, 2026, Hao Zhang wrote:
> From: Hao Zhang <zhanghao1@kylinos.cn>
>
> Restore L1's DR6 and DR7 when emulating a nested VM-Exit from L2 to L1.
> KVM loads L2's debug register state from vmcb12 on nested VMRUN, but
> currently restores DR7 to its reset value and leaves DR6 untouched when
> switching back to vmcb01. As a result, L1 can observe stale L2 DR6 state
> and lose its DR7 state after an L2 VM-Exit.
Well, yeah, because the APM says so. The APM very clearly says:
Disables all breakpoints in the host DR7 register.
In typical APM fashion, it says nothing about DR6, so it's reasonable to assume
it's preserved as-is across #VMEXIT, i.e. is L1's responsibility to ignore since
there's no #DB.
> Restore both registers from vmcb01, matching the rest of the L1 processor
> state restored on nested VM-Exit.
What happens to other state is irrelevant, what matters is what the architecture
says happens.
next prev parent reply other threads:[~2026-08-27 13:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-27 5:35 [PATCH 1/2] KVM: nSVM: Restore L1's debug registers on nested VM-Exit Hao Zhang
2026-08-27 5:38 ` [PATCH 2/2] selftests: kvm: Add regression test for nSVM debug register state Hao Zhang
2026-08-27 5:52 ` [PATCH 1/2] KVM: nSVM: Restore L1's debug registers on nested VM-Exit sashiko-bot
2026-08-27 13:43 ` Sean Christopherson [this message]
2026-08-28 1:11 ` Hao Zhang
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