Re: [PATCH v3 00/10] Introduce CET supervisor state support

[Dave Hansen <dave.hansen@intel.com>]

On 3/7/25 08:41, Chao Gao wrote:
> case |IA32_XSS[12] | Space | RFBM[12] | Drop%	
> -----+-------------+-------+----------+------
>   1  |	   0	   | None  |	0     |  0.0%
>   2  |	   1	   | None  |	0     |  0.2%
>   3  |	   1	   | 24B?  |	1     |  0.2%

So, 0.2% is still, what, dozens of cycles? Are you sure that it really
takes the CPU dozens of cycles to skip over the feature during XSAVE?

If it really turns out to be this measurable, we should probably follow
up with the folks that implement XSAVE and see what's going on under the
covers.

On a separate note, I was bugging Thomas a bit on IRC. His memory was
that the AMX-era FPU rework only expected KVM to support user features.
You might want to dig through the history a bit and see if _that_ was
ever properly addressed because that would change the problem you're
trying to solve.