[Bug 201753] AMD-Vi: Unable to write to IOMMU perf counter

bugzilla-daemon
2021-02-28T20:04:56Z

--- Comment #18 from Paul Menzel (pmenzel+bugzilla.kernel.org@molgen.mpg.de) ---
Even with ten tries in the loop, it still fails with the AMD Ryzen 3 2200G with
Radeon Vega Graphics (family: 0x17, model: 0x11, stepping: 0x0):

[ 0.401152] pci 0000:00:00.2: AMD-Vi: Unable to read/write to IOMMU perf
counter. (retry = 0)

```
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 9126efcbaf2c7..70c00ee5ff354 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -1746,7 +1746,7 @@ static void __init init_iommu_perf_ctr(struct amd_iommu
*iommu)

/* Check if the performance counters can be written to */
val = 0xabcd;
- for (retry = 5; retry; retry--) {
+ for (retry = 10; retry; retry--) {
if (iommu_pc_get_set_reg(iommu, 0, 0, 0, &val, true) ||
iommu_pc_get_set_reg(iommu, 0, 0, 0, &val2, false) ||
val2)
@@ -1764,7 +1764,7 @@ static void __init init_iommu_perf_ctr(struct amd_iommu
*iommu)
if (val != val2)
goto pc_false;

- pci_info(pdev, "IOMMU performance counters supported\n");
+ pci_info(pdev, "IOMMU performance counters supported (retry = %i)\n",
retry);

val = readl(iommu->mmio_base + MMIO_CNTR_CONF_OFFSET);
iommu->max_banks = (u8) ((val >> 12) & 0x3f);
@@ -1773,7 +1773,7 @@ static void __init init_iommu_perf_ctr(struct amd_iommu
*iommu)
return;

pc_false:
- pci_err(pdev, "Unable to read/write to IOMMU perf counter.\n");
+ pci_err(pdev, "Unable to read/write to IOMMU perf counter. (retry =
%i)\n", retry);
amd_iommu_pc_present = false;
return;
}
```