[Bug 82761] DMAR:[fault reason 06] PTE Read access is not set

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https://bugzilla.kernel.org/show_bug.cgi?id=82761

--- Comment #6 from Alex Williamson <alex.williamson@redhat.com> ---
Ok, then it's probably not a result of the PCIe-to-PCI bridge since 05:00.0 is
the correct requester ID for all the devices behind the bridge.  Unfortunately
that means that the problem may not be fixable.  We're only seeing reads to a
single address, which may mean the NIC is using that read to synchronize
transaction ordering, ex. using a DMA read to flush a DMA write from the
device.  If the NIC driver has visibility of this address, then it could
attempt to do a coherent mapping for the device(s) to avoid the fault.  If it
doesn't, then these NICs may simply be incompatible with the IOMMU.

Are these 3 separate NICs plugged into PCI slots on the motherboard or is this
a single triple-port card with embedded PCIe-to-PCI bridge?

You might be able to run the IOMMU in passthrough mode with iommu=pt
r8169.use_dac=1, but note the warning in modinfo "use_dac:Enable PCI DAC.
Unsafe on 32 bit PCI slot."  Unfortunately if you don't enable use_dac, then
intel_iommu will ignore the passthrough option for these devices.

Also note that this problem has nothing to do with Virtualization/KVM. 
Drivers/Network or perhaps Drivers/PCI would be a more appropriate
classification.

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