From: Baolu Lu <baolu.lu@linux.intel.com>
To: "Tian, Kevin" <kevin.tian@intel.com>, Jason Gunthorpe <jgg@nvidia.com>
Cc: baolu.lu@linux.intel.com, Zhangfei Gao <zhangfei.gao@linaro.org>,
"acpica-devel@lists.linux.dev" <acpica-devel@lists.linux.dev>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
Joerg Roedel <joro@8bytes.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Len Brown <lenb@kernel.org>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Moore, Robert" <robert.moore@intel.com>,
Robin Murphy <robin.murphy@arm.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Will Deacon <will@kernel.org>,
Alex Williamson <alex.williamson@redhat.com>,
Donald Dutile <ddutile@redhat.com>,
Eric Auger <eric.auger@redhat.com>,
Hanjun Guo <guohanjun@huawei.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Jerry Snitselaar <jsnitsel@redhat.com>,
Moritz Fischer <mdf@kernel.org>,
Michael Shavit <mshavit@google.com>,
Nicolin Chen <nicolinc@nvidia.com>,
"patches@lists.linux.dev" <patches@lists.linux.dev>,
"Wysocki, Rafael J" <rafael.j.wysocki@intel.com>,
Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
Mostafa Saleh <smostafa@google.com>
Subject: Re: [PATCH v4 00/12] Initial support for SMMUv3 nested translation
Date: Thu, 20 Feb 2025 19:49:01 +0800 [thread overview]
Message-ID: <c57977e2-d109-4a38-903e-8af6a7567a60@linux.intel.com> (raw)
In-Reply-To: <BN9PR11MB52764E131435DF44370653CD8CC42@BN9PR11MB5276.namprd11.prod.outlook.com>
On 2025/2/20 14:51, Tian, Kevin wrote:
>> From: Baolu Lu<baolu.lu@linux.intel.com>
>> Sent: Thursday, February 20, 2025 10:11 AM
>>
>> On 2/19/25 16:34, Tian, Kevin wrote:
>>>> From: Baolu Lu<baolu.lu@linux.intel.com>
>>>> Sent: Wednesday, February 19, 2025 10:10 AM
>>>>
>>>> On 2/18/25 21:03, Jason Gunthorpe wrote:
>>>>> On Sat, Feb 15, 2025 at 05:53:13PM +0800, Baolu Lu wrote:
>>>>>> On 2/14/25 20:41, Jason Gunthorpe wrote:
>>>>>>> On Fri, Feb 14, 2025 at 01:39:52PM +0800, Baolu Lu wrote:
>>>>>>>
>>>>>>>> When the IOMMU is working in scalable mode, PASID and PRI are
>>>> supported.
>>>>>>>> ATS will always be enabled, even if the identity domain is attached to
>>>>>>>> the device, because the PASID might use PRI, which depends on ATS
>>>>>>>> functionality. This might not be the best choice, but it is the
>>>>>>>> simplest and functional.
>>>>>>> The arm driver keeps track of things and enables ATS when PASIDs are
>>>>>>> present
>>>>>> I am not aware of any VT-d hardware implementation that supports
>>>>>> scalable mode but not PASID. If there were one, it would be worthwhile
>>>>>> to add an optimization to avoid enabling ATS during probe if PASID is
>>>>>> not supported.
>>>>> I mean domains attached to PASIDs that need PRI/ATS/etc
>>>> Yeah, that's a better solution. The PCI PRI/ATS features are only
>>>> enabled when a domain that requires them is attached to it. I will
>>>> consider it in the Intel driver later.
>>>>
>>> I didn't get the connection here. ATS can run w/o PASID per PCIe
>>> spec. Why do we want to add a dependency on PASID here?
>> It's due to PRI, which depends on ATS. The original topic is: when an
>> identity domain is attached to the device and the device has no PASID
>> support, then ATS might be disabled because ATS isn't supposed to
>> provide much benefit in this case.
> PRI depends on ATS but PASID is optional.
>
> ATS has no benefit (or even more cost) with identity domain but again
> it has nothing to do with PASID.
>
>> Otherwise, ATS should be enabled because:
>>
>> - It benefits performance when the domain is a paging domain.
>> - A domain attached to a PASID might use PRI, thus requiring ATS to be
>> on.
> Above talks about the domain type. Nothing specific to PASID.
>
>> The proposed solution is to use a reference count for ATS enablement,
>> similar to how we handle iopf in another series. ATS is enabled as long
>> as any domain requires it and disabled if no domain requires it.
>>
> I'm fine with using reference count for ATS enablement based on
> the domain type, but just didn't get the role of PASID in this discussion.
Sorry that I didn't make it clear. Let me try again.
PASID is mentioned in this discussion because it makes things different.
Without PASID support, only a single domain is attached to the device.
ATS enablement can then be determined based on the domain type.
Specifically:
- For an identity domain, ATS could be disabled.
- For other domains, ATS is enabled.
With PASID support, multiple domains can be attached to the device, and
each domain may have different ATS requirements. Therefore, we cannot
simply determine the ATS status in the RID domain attach/detach paths. A
better solution is to use the reference count, as mentioned above.
Thanks,
baolu
next prev parent reply other threads:[~2025-02-20 11:49 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-31 0:20 [PATCH v4 00/12] Initial support for SMMUv3 nested translation Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 01/12] vfio: Remove VFIO_TYPE1_NESTING_IOMMU Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 02/12] ACPICA: IORT: Update for revision E.f Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 03/12] ACPI/IORT: Support CANWBS memory access flag Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 04/12] iommu/arm-smmu-v3: Report IOMMU_CAP_ENFORCE_CACHE_COHERENCY for CANWBS Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 05/12] iommu/arm-smmu-v3: Support IOMMU_GET_HW_INFO via struct arm_smmu_hw_info Jason Gunthorpe
2024-11-04 11:47 ` Will Deacon
2024-11-04 12:41 ` Jason Gunthorpe
2024-11-06 16:37 ` Robin Murphy
2024-11-06 18:05 ` Jason Gunthorpe
2024-11-06 21:05 ` Robin Murphy
2024-11-06 21:53 ` Nicolin Chen
2024-11-07 2:35 ` Jason Gunthorpe
2024-11-07 15:51 ` Jason Gunthorpe
2024-11-08 14:53 ` Will Deacon
2024-11-08 15:42 ` Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 06/12] iommu/arm-smmu-v3: Implement IOMMU_HWPT_ALLOC_NEST_PARENT Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 07/12] iommu/arm-smmu-v3: Expose the arm_smmu_attach interface Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 08/12] iommu/arm-smmu-v3: Support IOMMU_VIOMMU_ALLOC Jason Gunthorpe
2024-11-29 14:38 ` Shameerali Kolothum Thodi
2024-11-29 15:06 ` Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 09/12] iommu/arm-smmu-v3: Support IOMMU_DOMAIN_NESTED Jason Gunthorpe
2024-10-31 6:21 ` Zhangfei Gao
2024-11-04 17:19 ` Jason Gunthorpe
2024-11-06 5:39 ` Zhangfei Gao
2024-10-31 0:20 ` [PATCH v4 10/12] iommu/arm-smmu-v3: Use S2FWB for NESTED domains Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 11/12] iommu/arm-smmu-v3: Allow ATS for IOMMU_DOMAIN_NESTED Jason Gunthorpe
2024-10-31 0:20 ` [PATCH v4 12/12] iommu/arm-smmu-v3: Support IOMMU_HWPT_INVALIDATE using a VIOMMU object Jason Gunthorpe
2024-10-31 0:53 ` [PATCH v4 00/12] Initial support for SMMUv3 nested translation Nicolin Chen
2024-11-01 12:18 ` Will Deacon
2024-11-01 13:25 ` Jason Gunthorpe
2024-11-05 16:48 ` Will Deacon
2024-11-05 17:03 ` Jason Gunthorpe
2024-11-08 14:56 ` Will Deacon
2024-11-12 18:29 ` Jason Gunthorpe
2024-11-13 1:01 ` Zhangfei Gao
2024-11-13 1:23 ` Jason Gunthorpe
2024-11-13 2:55 ` Baolu Lu
2024-11-13 6:28 ` Zhangfei Gao
2024-11-13 16:43 ` Jason Gunthorpe
2024-11-14 0:51 ` Baolu Lu
2024-11-15 17:55 ` Jason Gunthorpe
2025-01-22 19:26 ` Jason Gunthorpe
2025-02-05 3:45 ` Baolu Lu
2025-02-13 11:57 ` Baolu Lu
2025-02-13 18:43 ` Jason Gunthorpe
2025-02-14 5:39 ` Baolu Lu
2025-02-14 12:41 ` Jason Gunthorpe
2025-02-15 9:53 ` Baolu Lu
2025-02-18 13:03 ` Jason Gunthorpe
2025-02-19 2:09 ` Baolu Lu
2025-02-19 8:34 ` Tian, Kevin
2025-02-20 2:10 ` Baolu Lu
2025-02-20 6:51 ` Tian, Kevin
2025-02-20 11:49 ` Baolu Lu [this message]
2025-02-21 4:28 ` Tian, Kevin
2025-02-21 13:04 ` Jason Gunthorpe
2025-02-22 7:13 ` Baolu Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c57977e2-d109-4a38-903e-8af6a7567a60@linux.intel.com \
--to=baolu.lu@linux.intel.com \
--cc=acpica-devel@lists.linux.dev \
--cc=alex.williamson@redhat.com \
--cc=ddutile@redhat.com \
--cc=eric.auger@redhat.com \
--cc=guohanjun@huawei.com \
--cc=iommu@lists.linux.dev \
--cc=jean-philippe@linaro.org \
--cc=jgg@nvidia.com \
--cc=joro@8bytes.org \
--cc=jsnitsel@redhat.com \
--cc=kevin.tian@intel.com \
--cc=kvm@vger.kernel.org \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=mdf@kernel.org \
--cc=mshavit@google.com \
--cc=nicolinc@nvidia.com \
--cc=patches@lists.linux.dev \
--cc=rafael.j.wysocki@intel.com \
--cc=rafael@kernel.org \
--cc=robert.moore@intel.com \
--cc=robin.murphy@arm.com \
--cc=shameerali.kolothum.thodi@huawei.com \
--cc=smostafa@google.com \
--cc=sudeep.holla@arm.com \
--cc=will@kernel.org \
--cc=zhangfei.gao@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).