From: Dave Hansen <dave.hansen@intel.com>
To: Borislav Petkov <bp@alien8.de>,
Kim Phillips <kim.phillips@amd.com>,
Dave Hansen <dave.hansen@linux.intel.com>
Cc: x86@kernel.org, Boris Ostrovsky <boris.ostrovsky@oracle.com>,
"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
Joao Martins <joao.m.martins@oracle.com>,
Jonathan Corbet <corbet@lwn.net>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
David Woodhouse <dwmw@amazon.co.uk>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Juergen Gross <jgross@suse.com>,
Peter Zijlstra <peterz@infradead.org>,
Tony Luck <tony.luck@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Alexey Kardashevskiy <aik@amd.com>,
kvm@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 3/7] x86/cpu, kvm: Move the LFENCE_RDTSC / LFENCE always serializing feature
Date: Mon, 16 Jan 2023 13:15:29 -0800 [thread overview]
Message-ID: <cc344449-5f0b-51c7-bae8-6deb9be83702@intel.com> (raw)
In-Reply-To: <Y8WTnx/ukvdAEeoe@zn.tnic>
On 1/16/23 10:13, Borislav Petkov wrote:
>> /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */
>> #define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* "" AMD No Nested Data Breakpoints */
>> +#define X86_FEATURE_LFENCE_RDTSC (20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */
> Hmm, a synthetic bit which gets replaced with a vendor one and then the other
> vendors set it too. I don't see why that cannot work but we probably should be
> careful here.
>
> dhansen, am I missing an angle?
I don't think so.
I'd be surprised if we don't have a _few_ other cases like this around,
but nothing is coming to mind. Either way, it doesn't seem problematic.
next prev parent reply other threads:[~2023-01-16 21:15 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-10 22:46 [PATCH v6 0/7] x86/cpu, kvm: Support AMD Automatic IBRS Kim Phillips
2023-01-10 22:46 ` [PATCH v6 1/7] x86/cpufeatures: Add support for cpuid leaf 80000021/EAX (FeatureExt2Eax) Kim Phillips
2023-01-10 22:46 ` [PATCH v6 1/7] x86/cpu, kvm: " Kim Phillips
2023-01-10 22:46 ` [PATCH v6 2/7] x86/cpu, kvm: Add the NO_NESTED_DATA_BP feature Kim Phillips
2023-01-20 1:33 ` Sean Christopherson
2023-01-20 11:05 ` Borislav Petkov
2023-01-10 22:46 ` [PATCH v6 3/7] x86/cpu, kvm: Move the LFENCE_RDTSC / LFENCE always serializing feature Kim Phillips
2023-01-16 18:13 ` Borislav Petkov
2023-01-16 21:15 ` Dave Hansen [this message]
2023-01-16 21:22 ` Borislav Petkov
2023-01-10 22:46 ` [PATCH v6 4/7] x86/cpu, kvm: Add the Null Selector Clears Base feature Kim Phillips
2023-01-10 22:46 ` [PATCH v6 5/7] x86/cpu, kvm: Add the SMM_CTL MSR not present feature Kim Phillips
2023-01-10 22:46 ` [PATCH v6 6/7] x86/cpu: Support AMD Automatic IBRS Kim Phillips
2023-01-11 22:29 ` Dave Hansen
2023-01-10 22:46 ` [PATCH v6 7/7] x86/cpu, kvm: Propagate the AMD Automatic IBRS feature to the guest Kim Phillips
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