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From: Paolo Bonzini <pbonzini@redhat.com>
To: "Radim Krčmář" <rkrcmar@redhat.com>, kvm@vger.kernel.org
Cc: "Lan, Tianyu" <tianyu.lan@intel.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Jan Kiszka <jan.kiszka@web.de>, Peter Xu <peterx@redhat.com>
Subject: Re: [PATCH 7/9] KVM: x86: use proper format of APIC ID register
Date: Tue, 17 May 2016 17:34:31 +0200	[thread overview]
Message-ID: <cead5a97-01c4-281b-db5b-bf844a3a95cb@redhat.com> (raw)
In-Reply-To: <1462568045-31085-8-git-send-email-rkrcmar@redhat.com>



On 06/05/2016 22:54, Radim Krčmář wrote:
> We currently always shift APIC ID as if APIC was in xAPIC mode.
> x2APIC mode wants to use more bits and storing a hardware-compabible
> value is the the sanest option.  VMX can stop intercepting the APIC ID
> register then.
> 
> KVM API to set the lapic expects that bottom 8 bits of APIC ID are in
> top 8 bits of APIC_ID register.  Definite that x2APIC IDs are byte
> swapped to keep compatibility without new toggles.

That's a bit too clever...  Can we make KVM_CAP_MSI_X2APIC an
enable-able capability (and then better rename it KVM_CAP_X2APIC_ID),
and then all ids become 32 bit?  This fixes the APIC ID issue here, and
avoids introducing a new routing type in patch 5.

The cost is a little extra complexity in QEMU, but I think it's bearable.

Paolo

> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
> ---
>  Documentation/virtual/kvm/api.txt |  6 ++++++
>  arch/x86/kvm/lapic.c              | 44 ++++++++++++++++++++++++++++-----------
>  arch/x86/kvm/lapic.h              |  7 ++++++-
>  arch/x86/kvm/vmx.c                |  4 ----
>  arch/x86/kvm/x86.c                |  2 ++
>  5 files changed, 46 insertions(+), 17 deletions(-)
> 
> diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
> index 07bcedc0ba09..b1ddea38e6b9 100644
> --- a/Documentation/virtual/kvm/api.txt
> +++ b/Documentation/virtual/kvm/api.txt
> @@ -1583,6 +1583,11 @@ struct kvm_lapic_state {
>  Reads the Local APIC registers and copies them into the input argument.  The
>  data format and layout are the same as documented in the architecture manual.
>  
> +Note that the APIC ID is stored in APIC_ID register in big endian format.
> +This makes no difference for xAPIC APIC ID, which is still in the top 8 bits,
> +but x2APIC ID needs to be byteswapped.  The reason is compatibility with KVM's
> +definition of x2APIC.  (The hardware stores x2APIC ID as little endian.)
> +

  reply	other threads:[~2016-05-17 15:34 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-06 20:53 [RFC 0/9] KVM: x86: break the xAPIC barrier Radim Krčmář
2016-05-06 20:53 ` [PATCH 1/9] KVM: x86: add kvm_apic_map_get_dest_lapic Radim Krčmář
2016-05-19  6:36   ` Peter Xu
2016-05-25 16:02     ` Radim Krčmář
2016-05-26 11:58       ` Peter Xu
2016-05-06 20:53 ` [PATCH 2/9] KVM: x86: dynamic kvm_apic_map Radim Krčmář
2016-05-23  8:04   ` Peter Xu
2016-05-25 16:15     ` Radim Krčmář
2016-05-30  5:24       ` Peter Xu
2016-05-06 20:53 ` [PATCH 3/9] KVM: x86: use u16 for logical VCPU mask in lapic Radim Krčmář
2016-05-06 20:54 ` [PATCH 4/9] KVM: x86: use generic function for MSI parsing Radim Krčmář
2016-05-06 20:54 ` [PATCH 5/9] KVM: support x2APIC ID in userspace routes Radim Krčmář
2016-05-06 20:54 ` [PATCH 6/9] KVM: x86: directly call recalculate_apic_map on lapic restore Radim Krčmář
2016-05-23  8:30   ` Peter Xu
2016-05-06 20:54 ` [PATCH 7/9] KVM: x86: use proper format of APIC ID register Radim Krčmář
2016-05-17 15:34   ` Paolo Bonzini [this message]
2016-05-25 16:30     ` Radim Krčmář
2016-05-06 20:54 ` [PATCH 8/9] KVM: x86: reset lapic base in kvm_lapic_reset Radim Krčmář
2016-05-06 20:54 ` [PATCH 9/9] KVM: bump MAX_VCPUS Radim Krčmář

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