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From: Paolo Bonzini <pbonzini@redhat.com>
To: Sean Christopherson <seanjc@google.com>,
	Joerg Roedel <joro@8bytes.org>,
	David Woodhouse <dwmw2@infradead.org>,
	Lu Baolu <baolu.lu@linux.intel.com>
Cc: kvm@vger.kernel.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org,
	Maxim Levitsky <mlevitsk@redhat.com>,
	Joao Martins <joao.m.martins@oracle.com>,
	David Matlack <dmatlack@google.com>
Subject: Re: [PATCH 33/67] KVM: x86: Dedup AVIC vs. PI code for identifying target vCPU
Date: Tue, 8 Apr 2025 19:30:58 +0200	[thread overview]
Message-ID: <cf4d9b81-c1ab-40a6-8c8c-36ad36b9be63@redhat.com> (raw)
In-Reply-To: <20250404193923.1413163-34-seanjc@google.com>

On 4/4/25 21:38, Sean Christopherson wrote:
> Hoist the logic for identifying the target vCPU for a posted interrupt
> into common x86.  The code is functionally identical between Intel and
> AMD.
> 
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
>   arch/x86/include/asm/kvm_host.h |  3 +-
>   arch/x86/kvm/svm/avic.c         | 83 ++++++++-------------------------
>   arch/x86/kvm/svm/svm.h          |  3 +-
>   arch/x86/kvm/vmx/posted_intr.c  | 56 ++++++----------------
>   arch/x86/kvm/vmx/posted_intr.h  |  3 +-
>   arch/x86/kvm/x86.c              | 46 +++++++++++++++---

Please use irq.c, since (for once) there is a file other than x86.c that 
can be used.

Bonus points for merging irq_comm.c into irq.c (IIRC irq_comm.c was 
"common" between ia64 and x86 :)).

Paolo

>   6 files changed, 81 insertions(+), 113 deletions(-)
> 
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 85f45fc5156d..cb98d8d3c6c2 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -1838,7 +1838,8 @@ struct kvm_x86_ops {
>   
>   	int (*pi_update_irte)(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   			      unsigned int host_irq, uint32_t guest_irq,
> -			      struct kvm_kernel_irq_routing_entry *new);
> +			      struct kvm_kernel_irq_routing_entry *new,
> +			      struct kvm_vcpu *vcpu, u32 vector);
>   	void (*pi_start_assignment)(struct kvm *kvm);
>   	void (*apicv_pre_state_restore)(struct kvm_vcpu *vcpu);
>   	void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
> diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
> index ea6eae72b941..666f518340a7 100644
> --- a/arch/x86/kvm/svm/avic.c
> +++ b/arch/x86/kvm/svm/avic.c
> @@ -812,52 +812,13 @@ static int svm_ir_list_add(struct vcpu_svm *svm,
>   	return 0;
>   }
>   
> -/*
> - * Note:
> - * The HW cannot support posting multicast/broadcast
> - * interrupts to a vCPU. So, we still use legacy interrupt
> - * remapping for these kind of interrupts.
> - *
> - * For lowest-priority interrupts, we only support
> - * those with single CPU as the destination, e.g. user
> - * configures the interrupts via /proc/irq or uses
> - * irqbalance to make the interrupts single-CPU.
> - */
> -static int
> -get_pi_vcpu_info(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
> -		 struct vcpu_data *vcpu_info, struct kvm_vcpu **vcpu)
> -{
> -	struct kvm_lapic_irq irq;
> -	*vcpu = NULL;
> -
> -	kvm_set_msi_irq(kvm, e, &irq);
> -
> -	if (!kvm_intr_is_single_vcpu(kvm, &irq, vcpu) ||
> -	    !kvm_irq_is_postable(&irq)) {
> -		pr_debug("SVM: %s: use legacy intr remap mode for irq %u\n",
> -			 __func__, irq.vector);
> -		return -1;
> -	}
> -
> -	pr_debug("SVM: %s: use GA mode for irq %u\n", __func__,
> -		 irq.vector);
> -	vcpu_info->vector = irq.vector;
> -
> -	return 0;
> -}
> -
>   int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   			unsigned int host_irq, uint32_t guest_irq,
> -			struct kvm_kernel_irq_routing_entry *new)
> +			struct kvm_kernel_irq_routing_entry *new,
> +			struct kvm_vcpu *vcpu, u32 vector)
>   {
> -	bool enable_remapped_mode = true;
> -	struct vcpu_data vcpu_info;
> -	struct kvm_vcpu *vcpu = NULL;
>   	int ret = 0;
>   
> -	if (!kvm_arch_has_assigned_device(kvm) || !kvm_arch_has_irq_bypass())
> -		return 0;
> -
>   	/*
>   	 * If the IRQ was affined to a different vCPU, remove the IRTE metadata
>   	 * from the *previous* vCPU's list.
> @@ -865,7 +826,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   	svm_ir_list_del(irqfd);
>   
>   	pr_debug("SVM: %s: host_irq=%#x, guest_irq=%#x, set=%#x\n",
> -		 __func__, host_irq, guest_irq, !!new);
> +		 __func__, host_irq, guest_irq, !!vcpu);
>   
>   	/**
>   	 * Here, we setup with legacy mode in the following cases:
> @@ -874,23 +835,23 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   	 * 3. APIC virtualization is disabled for the vcpu.
>   	 * 4. IRQ has incompatible delivery mode (SMI, INIT, etc)
>   	 */
> -	if (new && new && new->type == KVM_IRQ_ROUTING_MSI &&
> -	    !get_pi_vcpu_info(kvm, new, &vcpu_info, &vcpu) &&
> -	    kvm_vcpu_apicv_active(vcpu)) {
> -		struct amd_iommu_pi_data pi;
> -
> -		enable_remapped_mode = false;
> -
> -		vcpu_info.pi_desc_addr = avic_get_backing_page_address(to_svm(vcpu));
> -
> +	if (vcpu && kvm_vcpu_apicv_active(vcpu)) {
>   		/*
>   		 * Try to enable guest_mode in IRTE.  Note, the address
>   		 * of the vCPU's AVIC backing page is passed to the
>   		 * IOMMU via vcpu_info->pi_desc_addr.
>   		 */
> -		pi.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, vcpu->vcpu_id);
> -		pi.is_guest_mode = true;
> -		pi.vcpu_data = &vcpu_info;
> +		struct vcpu_data vcpu_info = {
> +			.pi_desc_addr = avic_get_backing_page_address(to_svm(vcpu)),
> +			.vector = vector,
> +		};
> +
> +		struct amd_iommu_pi_data pi = {
> +			.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, vcpu->vcpu_id),
> +			.is_guest_mode = true,
> +			.vcpu_data = &vcpu_info,
> +		};
> +
>   		ret = irq_set_vcpu_affinity(host_irq, &pi);
>   
>   		/**
> @@ -902,12 +863,11 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   		 */
>   		if (!ret)
>   			ret = svm_ir_list_add(to_svm(vcpu), irqfd, &pi);
> -	}
>   
> -	if (!ret && vcpu) {
> -		trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id,
> -					 guest_irq, vcpu_info.vector,
> -					 vcpu_info.pi_desc_addr, !!new);
> +		trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, guest_irq,
> +					 vector, vcpu_info.pi_desc_addr, true);
> +	} else {
> +		ret = irq_set_vcpu_affinity(host_irq, NULL);
>   	}
>   
>   	if (ret < 0) {
> @@ -915,10 +875,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   		goto out;
>   	}
>   
> -	if (enable_remapped_mode)
> -		ret = irq_set_vcpu_affinity(host_irq, NULL);
> -	else
> -		ret = 0;
> +	ret = 0;
>   out:
>   	return ret;
>   }
> diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
> index 6ad0aa86f78d..5ce240085ee0 100644
> --- a/arch/x86/kvm/svm/svm.h
> +++ b/arch/x86/kvm/svm/svm.h
> @@ -741,7 +741,8 @@ void avic_apicv_post_state_restore(struct kvm_vcpu *vcpu);
>   void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu);
>   int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   			unsigned int host_irq, uint32_t guest_irq,
> -			struct kvm_kernel_irq_routing_entry *new);
> +			struct kvm_kernel_irq_routing_entry *new,
> +			struct kvm_vcpu *vcpu, u32 vector);
>   void avic_vcpu_blocking(struct kvm_vcpu *vcpu);
>   void avic_vcpu_unblocking(struct kvm_vcpu *vcpu);
>   void avic_ring_doorbell(struct kvm_vcpu *vcpu);
> diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c
> index 786912cee3f8..fd5f6a125614 100644
> --- a/arch/x86/kvm/vmx/posted_intr.c
> +++ b/arch/x86/kvm/vmx/posted_intr.c
> @@ -266,46 +266,20 @@ void vmx_pi_start_assignment(struct kvm *kvm)
>   
>   int vmx_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   		       unsigned int host_irq, uint32_t guest_irq,
> -		       struct kvm_kernel_irq_routing_entry *new)
> +		       struct kvm_kernel_irq_routing_entry *new,
> +		       struct kvm_vcpu *vcpu, u32 vector)
>   {
> -	struct kvm_lapic_irq irq;
> -	struct kvm_vcpu *vcpu;
> -	struct vcpu_data vcpu_info;
> -
> -	if (!vmx_can_use_vtd_pi(kvm))
> -		return 0;
> -
> -	/*
> -	 * VT-d PI cannot support posting multicast/broadcast
> -	 * interrupts to a vCPU, we still use interrupt remapping
> -	 * for these kind of interrupts.
> -	 *
> -	 * For lowest-priority interrupts, we only support
> -	 * those with single CPU as the destination, e.g. user
> -	 * configures the interrupts via /proc/irq or uses
> -	 * irqbalance to make the interrupts single-CPU.
> -	 *
> -	 * We will support full lowest-priority interrupt later.
> -	 *
> -	 * In addition, we can only inject generic interrupts using
> -	 * the PI mechanism, refuse to route others through it.
> -	 */
> -	if (!new || new->type != KVM_IRQ_ROUTING_MSI)
> -		goto do_remapping;
> -
> -	kvm_set_msi_irq(kvm, new, &irq);
> -
> -	if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
> -	    !kvm_irq_is_postable(&irq))
> -		goto do_remapping;
> -
> -	vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
> -	vcpu_info.vector = irq.vector;
> -
> -	trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, guest_irq,
> -				 vcpu_info.vector, vcpu_info.pi_desc_addr, true);
> -
> -	return irq_set_vcpu_affinity(host_irq, &vcpu_info);
> -do_remapping:
> -	return irq_set_vcpu_affinity(host_irq, NULL);
> +	if (vcpu) {
> +		struct vcpu_data vcpu_info = {
> +			.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu)),
> +			.vector = vector,
> +		};
> +
> +		trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, guest_irq,
> +					 vcpu_info.vector, vcpu_info.pi_desc_addr, true);
> +
> +		return irq_set_vcpu_affinity(host_irq, &vcpu_info);
> +	} else {
> +		return irq_set_vcpu_affinity(host_irq, NULL);
> +	}
>   }
> diff --git a/arch/x86/kvm/vmx/posted_intr.h b/arch/x86/kvm/vmx/posted_intr.h
> index a586d6aaf862..ee3e19e976ac 100644
> --- a/arch/x86/kvm/vmx/posted_intr.h
> +++ b/arch/x86/kvm/vmx/posted_intr.h
> @@ -15,7 +15,8 @@ void __init pi_init_cpu(int cpu);
>   bool pi_has_pending_interrupt(struct kvm_vcpu *vcpu);
>   int vmx_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
>   		       unsigned int host_irq, uint32_t guest_irq,
> -		       struct kvm_kernel_irq_routing_entry *new);
> +		       struct kvm_kernel_irq_routing_entry *new,
> +		       struct kvm_vcpu *vcpu, u32 vector);
>   void vmx_pi_start_assignment(struct kvm *kvm);
>   
>   static inline int pi_find_highest_vector(struct pi_desc *pi_desc)
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index b8b259847d05..0ab818bba743 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -13567,6 +13567,43 @@ bool kvm_arch_has_irq_bypass(void)
>   }
>   EXPORT_SYMBOL_GPL(kvm_arch_has_irq_bypass);
>   
> +static int kvm_pi_update_irte(struct kvm_kernel_irqfd *irqfd,
> +			      struct kvm_kernel_irq_routing_entry *old,
> +			      struct kvm_kernel_irq_routing_entry *new)
> +{
> +	struct kvm *kvm = irqfd->kvm;
> +	struct kvm_vcpu *vcpu = NULL;
> +	struct kvm_lapic_irq irq;
> +
> +	if (!irqchip_in_kernel(kvm) ||
> +	    !kvm_arch_has_irq_bypass() ||
> +	    !kvm_arch_has_assigned_device(kvm))
> +		return 0;
> +
> +	if (new && new->type == KVM_IRQ_ROUTING_MSI) {
> +		kvm_set_msi_irq(kvm, new, &irq);
> +
> +		/*
> +		 * Force remapped mode if hardware doesn't support posting the
> +		 * virtual interrupt to a vCPU.  Only IRQs are postable (NMIs,
> +		 * SMIs, etc. are not), and neither AMD nor Intel IOMMUs support
> +		 * posting multicast/broadcast IRQs.  If the interrupt can't be
> +		 * posted, the device MSI needs to be routed to the host so that
> +		 * the guest's desired interrupt can be synthesized by KVM.
> +		 *
> +		 * This means that KVM can only post lowest-priority interrupts
> +		 * if they have a single CPU as the destination, e.g. only if
> +		 * the guest has affined the interrupt to a single vCPU.
> +		 */
> +		if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
> +		    !kvm_irq_is_postable(&irq))
> +			vcpu = NULL;
> +	}
> +
> +	return kvm_x86_call(pi_update_irte)(irqfd, irqfd->kvm, irqfd->producer->irq,
> +					    irqfd->gsi, new, vcpu, irq.vector);
> +}
> +
>   int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
>   				      struct irq_bypass_producer *prod)
>   {
> @@ -13581,8 +13618,7 @@ int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
>   	irqfd->producer = prod;
>   
>   	if (irqfd->irq_entry.type == KVM_IRQ_ROUTING_MSI) {
> -		ret = kvm_x86_call(pi_update_irte)(irqfd, irqfd->kvm, prod->irq,
> -						   irqfd->gsi, &irqfd->irq_entry);
> +		ret = kvm_pi_update_irte(irqfd, NULL, &irqfd->irq_entry);
>   		if (ret)
>   			kvm_arch_end_assignment(irqfd->kvm);
>   	}
> @@ -13610,8 +13646,7 @@ void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
>   	spin_lock_irq(&kvm->irqfds.lock);
>   
>   	if (irqfd->irq_entry.type == KVM_IRQ_ROUTING_MSI) {
> -		ret = kvm_x86_call(pi_update_irte)(irqfd, irqfd->kvm, prod->irq,
> -						   irqfd->gsi, NULL);
> +		ret = kvm_pi_update_irte(irqfd, &irqfd->irq_entry, NULL);
>   		if (ret)
>   			pr_info("irq bypass consumer (token %p) unregistration fails: %d\n",
>   				irqfd->consumer.token, ret);
> @@ -13628,8 +13663,7 @@ int kvm_arch_update_irqfd_routing(struct kvm_kernel_irqfd *irqfd,
>   				  struct kvm_kernel_irq_routing_entry *old,
>   				  struct kvm_kernel_irq_routing_entry *new)
>   {
> -	return kvm_x86_call(pi_update_irte)(irqfd, irqfd->kvm, irqfd->producer->irq,
> -					    irqfd->gsi, new);
> +	return kvm_pi_update_irte(irqfd, old, new);
>   }
>   
>   bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,


  reply	other threads:[~2025-04-08 17:31 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-04 19:38 [PATCH 00/67] KVM: iommu: Overhaul device posted IRQs support Sean Christopherson
2025-04-04 19:38 ` [PATCH 01/67] KVM: SVM: Allocate IR data using atomic allocation Sean Christopherson
2025-04-04 19:38 ` [PATCH 02/67] KVM: x86: Reset IRTE to host control if *new* route isn't postable Sean Christopherson
2025-04-11  8:08   ` Sairaj Kodilkar
2025-04-11 14:16     ` Sean Christopherson
2025-04-15 11:36       ` Paolo Bonzini
2025-04-04 19:38 ` [PATCH 03/67] KVM: x86: Explicitly treat routing entry type changes as changes Sean Christopherson
2025-04-04 19:38 ` [PATCH 04/67] KVM: x86: Take irqfds.lock when adding/deleting IRQ bypass producer Sean Christopherson
2025-04-04 19:38 ` [PATCH 05/67] iommu/amd: Return an error if vCPU affinity is set for non-vCPU IRTE Sean Christopherson
2025-04-11  8:34   ` Sairaj Kodilkar
2025-04-11 14:05     ` Sean Christopherson
2025-04-11 17:02       ` Sairaj Kodilkar
2025-04-11 19:30         ` Sean Christopherson
2025-04-18 12:25   ` Vasant Hegde
2025-04-04 19:38 ` [PATCH 06/67] iommu/amd: WARN if KVM attempts to set vCPU affinity without posted intrrupts Sean Christopherson
2025-04-11  8:28   ` Sairaj Kodilkar
2025-04-11 14:10     ` Sean Christopherson
2025-04-11 17:03       ` Sairaj Kodilkar
2025-04-15 11:42       ` Paolo Bonzini
2025-04-15 17:48       ` Vasant Hegde
2025-04-15 22:04         ` Sean Christopherson
2025-04-16  9:47           ` Sairaj Kodilkar
2025-04-17 17:37             ` Paolo Bonzini
2025-04-04 19:38 ` [PATCH 07/67] KVM: SVM: WARN if an invalid posted interrupt IRTE entry is added Sean Christopherson
2025-04-04 19:38 ` [PATCH 08/67] KVM: x86: Pass new routing entries and irqfd when updating IRTEs Sean Christopherson
2025-04-11 10:57   ` Arun Kodilkar, Sairaj
2025-04-11 14:01     ` Sean Christopherson
2025-04-11 17:22       ` Sairaj Kodilkar
2025-04-04 19:38 ` [PATCH 09/67] KVM: SVM: Track per-vCPU IRTEs using kvm_kernel_irqfd structure Sean Christopherson
2025-04-11  7:47   ` Arun Kodilkar, Sairaj
2025-04-11 14:32     ` Sean Christopherson
2025-04-04 19:38 ` [PATCH 10/67] KVM: SVM: Delete IRTE link from previous vCPU before setting new IRTE Sean Christopherson
2025-04-04 19:38 ` [PATCH 11/67] KVM: SVM: Delete IRTE link from previous vCPU irrespective of new routing Sean Christopherson
2025-04-15 11:06   ` Sairaj Kodilkar
2025-04-15 14:55     ` Sean Christopherson
2025-04-04 19:38 ` [PATCH 12/67] KVM: SVM: Drop pointless masking of default APIC base when setting V_APIC_BAR Sean Christopherson
2025-04-04 19:38 ` [PATCH 13/67] KVM: SVM: Drop pointless masking of kernel page pa's with AVIC HPA masks Sean Christopherson
2025-04-04 19:38 ` [PATCH 14/67] KVM: SVM: Add helper to deduplicate code for getting AVIC backing page Sean Christopherson
2025-04-15 11:11   ` Sairaj Kodilkar
2025-04-15 14:57     ` Sean Christopherson
2025-04-04 19:38 ` [PATCH 15/67] KVM: SVM: Drop vcpu_svm's pointless avic_backing_page field Sean Christopherson
2025-04-04 19:38 ` [PATCH 16/67] KVM: SVM: Inhibit AVIC if ID is too big instead of rejecting vCPU creation Sean Christopherson
2025-04-04 19:38 ` [PATCH 17/67] KVM: SVM: Drop redundant check in AVIC code on ID during " Sean Christopherson
2025-04-15 11:16   ` Sairaj Kodilkar
2025-04-04 19:38 ` [PATCH 18/67] KVM: SVM: Track AVIC tables as natively sized pointers, not "struct pages" Sean Christopherson
2025-04-04 19:38 ` [PATCH 19/67] KVM: SVM: Drop superfluous "cache" of AVIC Physical ID entry pointer Sean Christopherson
2025-04-04 19:38 ` [PATCH 20/67] KVM: VMX: Move enable_ipiv knob to common x86 Sean Christopherson
2025-04-04 19:38 ` [PATCH 21/67] KVM: SVM: Add enable_ipiv param, never set IsRunning if disabled Sean Christopherson
2025-04-04 19:38 ` [PATCH 22/67] KVM: SVM: Disable (x2)AVIC IPI virtualization if CPU has erratum #1235 Sean Christopherson
2025-04-04 19:38 ` [PATCH 23/67] KVM: VMX: Suppress PI notifications whenever the vCPU is put Sean Christopherson
2025-04-04 19:38 ` [PATCH 24/67] KVM: SVM: Add a comment to explain why avic_vcpu_blocking() ignores IRQ blocking Sean Christopherson
2025-04-04 19:38 ` [PATCH 25/67] iommu/amd: KVM: SVM: Use pi_desc_addr to derive ga_root_ptr Sean Christopherson
2025-04-18 12:24   ` Vasant Hegde
2025-04-04 19:38 ` [PATCH 26/67] iommu/amd: KVM: SVM: Delete now-unused cached/previous GA tag fields Sean Christopherson
2025-04-08 16:57   ` Paolo Bonzini
2025-04-08 22:25     ` Sean Christopherson
2025-04-18 12:25   ` Vasant Hegde
2025-04-04 19:38 ` [PATCH 27/67] iommu/amd: KVM: SVM: Pass NULL @vcpu_info to indicate "not guest mode" Sean Christopherson
2025-04-04 19:38 ` [PATCH 28/67] KVM: SVM: Get vCPU info for IRTE using new routing entry Sean Christopherson
2025-04-04 19:38 ` [PATCH 29/67] KVM: SVM: Stop walking list of routing table entries when updating IRTE Sean Christopherson
2025-04-08 16:56   ` Paolo Bonzini
2025-04-04 19:38 ` [PATCH 30/67] KVM: VMX: " Sean Christopherson
2025-04-08 17:00   ` Paolo Bonzini
2025-05-20 20:36     ` Sean Christopherson
2025-04-04 19:38 ` [PATCH 31/67] KVM: SVM: Extract SVM specific code out of get_pi_vcpu_info() Sean Christopherson
2025-04-23 15:21   ` Francesco Lavra
2025-04-23 15:55     ` Sean Christopherson
2025-04-04 19:38 ` [PATCH 32/67] KVM: x86: Nullify irqfd->producer after updating IRTEs Sean Christopherson
2025-04-04 19:38 ` [PATCH 33/67] KVM: x86: Dedup AVIC vs. PI code for identifying target vCPU Sean Christopherson
2025-04-08 17:30   ` Paolo Bonzini [this message]
2025-04-08 20:51     ` Sean Christopherson
2025-04-24  4:39   ` Sairaj Kodilkar
2025-04-24 14:13     ` Sean Christopherson
2025-04-04 19:38 ` [PATCH 34/67] KVM: x86: Move posted interrupt tracepoint to common code Sean Christopherson
2025-04-04 19:38 ` [PATCH 35/67] KVM: SVM: Clean up return handling in avic_pi_update_irte() Sean Christopherson
2025-04-04 19:38 ` [PATCH 36/67] iommu: KVM: Split "struct vcpu_data" into separate AMD vs. Intel structs Sean Christopherson
2025-04-04 19:38 ` [PATCH 37/67] KVM: Don't WARN if updating IRQ bypass route fails Sean Christopherson
2025-04-04 19:38 ` [PATCH 38/67] KVM: Fold kvm_arch_irqfd_route_changed() into kvm_arch_update_irqfd_routing() Sean Christopherson
2025-04-04 19:38 ` [PATCH 39/67] KVM: x86: Track irq_bypass_vcpu in common x86 code Sean Christopherson
2025-04-04 19:38 ` [PATCH 40/67] KVM: x86: Skip IOMMU IRTE updates if there's no old or new vCPU being targeted Sean Christopherson
2025-04-04 19:38 ` [PATCH 41/67] KVM: x86: Don't update IRTE entries when old and new routes were !MSI Sean Christopherson
2025-04-04 19:38 ` [PATCH 42/67] KVM: SVM: Revert IRTE to legacy mode if IOMMU doesn't provide IR metadata Sean Christopherson
2025-04-04 19:38 ` [PATCH 43/67] KVM: SVM: Take and hold ir_list_lock across IRTE updates in IOMMU Sean Christopherson
2025-04-04 19:38 ` [PATCH 44/67] iommu/amd: KVM: SVM: Infer IsRun from validity of pCPU destination Sean Christopherson
2025-04-08 12:26   ` Joerg Roedel
2025-04-04 19:39 ` [PATCH 45/67] iommu/amd: Factor out helper for manipulating IRTE GA/CPU info Sean Christopherson
2025-04-04 19:39 ` [PATCH 46/67] iommu/amd: KVM: SVM: Set pCPU info in IRTE when setting vCPU affinity Sean Christopherson
2025-04-04 19:39 ` [PATCH 47/67] iommu/amd: KVM: SVM: Add IRTE metadata to affined vCPU's list if AVIC is inhibited Sean Christopherson
2025-04-04 19:39 ` [PATCH 48/67] KVM: SVM: Don't check for assigned device(s) when updating affinity Sean Christopherson
2025-04-04 19:39 ` [PATCH 49/67] KVM: SVM: Don't check for assigned device(s) when activating AVIC Sean Christopherson
2025-04-04 19:39 ` [PATCH 50/67] KVM: SVM: WARN if (de)activating guest mode in IOMMU fails Sean Christopherson
2025-04-04 19:39 ` [PATCH 51/67] KVM: SVM: Process all IRTEs on affinity change even if one update fails Sean Christopherson
2025-04-04 19:39 ` [PATCH 52/67] KVM: SVM: WARN if updating IRTE GA fields in IOMMU fails Sean Christopherson
2025-04-04 19:39 ` [PATCH 53/67] KVM: x86: Drop superfluous "has assigned device" check in kvm_pi_update_irte() Sean Christopherson
2025-04-04 19:39 ` [PATCH 54/67] KVM: x86: WARN if IRQ bypass isn't supported " Sean Christopherson
2025-04-04 19:39 ` [PATCH 55/67] KVM: x86: WARN if IRQ bypass routing is updated without in-kernel local APIC Sean Christopherson
2025-04-04 19:39 ` [PATCH 56/67] KVM: SVM: WARN if ir_list is non-empty at vCPU free Sean Christopherson
2025-04-04 19:39 ` [PATCH 57/67] KVM: x86: Decouple device assignment from IRQ bypass Sean Christopherson
2025-04-04 19:39 ` [PATCH 58/67] KVM: VMX: WARN if VT-d Posted IRQs aren't possible when starting " Sean Christopherson
2025-04-04 19:39 ` [PATCH 59/67] KVM: SVM: Use vcpu_idx, not vcpu_id, for GA log tag/metadata Sean Christopherson
2025-04-04 19:39 ` [PATCH 60/67] iommu/amd: WARN if KVM calls GA IRTE helpers without virtual APIC support Sean Christopherson
2025-04-04 19:39 ` [PATCH 61/67] KVM: SVM: Fold avic_set_pi_irte_mode() into its sole caller Sean Christopherson
2025-04-04 19:39 ` [PATCH 62/67] KVM: SVM: Don't check vCPU's blocking status when toggling AVIC on/off Sean Christopherson
2025-04-08 17:51   ` Paolo Bonzini
2025-04-04 19:39 ` [PATCH 63/67] KVM: SVM: Consolidate IRTE update " Sean Christopherson
2025-04-04 19:39 ` [PATCH 64/67] iommu/amd: KVM: SVM: Allow KVM to control need for GA log interrupts Sean Christopherson
2025-04-09 11:56   ` Joao Martins
2025-04-10 15:45     ` Sean Christopherson
2025-04-10 17:13       ` Joao Martins
2025-04-10 17:29         ` Sean Christopherson
2025-04-18 12:17     ` Vasant Hegde
2025-04-18 18:48       ` Sean Christopherson
2025-04-23 10:21         ` Joao Martins
2025-04-04 19:39 ` [PATCH 65/67] KVM: SVM: Generate GA log IRQs only if the associated vCPUs is blocking Sean Christopherson
2025-04-08 17:53   ` Paolo Bonzini
2025-04-08 21:31     ` Sean Christopherson
2025-04-09 10:34       ` Paolo Bonzini
2025-04-04 19:39 ` [PATCH 66/67] *** DO NOT MERGE *** iommu/amd: Hack to fake IRQ posting support Sean Christopherson
2025-04-04 19:39 ` [PATCH 67/67] *** DO NOT MERGE *** KVM: selftests: WIP posted interrupts test Sean Christopherson
2025-04-08 12:44 ` [PATCH 00/67] KVM: iommu: Overhaul device posted IRQs support Joerg Roedel
2025-04-09  8:30   ` Vasant Hegde
2025-04-08 15:36 ` Paolo Bonzini
2025-04-08 17:13 ` David Matlack
2025-05-23 23:52   ` David Matlack
2025-04-18 13:01 ` David Woodhouse
2025-04-18 16:22   ` Sean Christopherson
2025-05-15 12:08 ` Sairaj Kodilkar
2025-05-15 22:05   ` Sean Christopherson

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