Re: [PATCH v3 1/3] x86/cpu: Enable FSGSBASE early in cpu_init_exception_handling()

[Sohil Mehta <sohil.mehta@intel.com>]

Hi Nikunj,

The code changes and the commit message looks fine to me. I would
suggest a minor correction to the code comment and the commit log. I
found it slightly misleading. It can probably be fixed up while applying
as well.

On 3/18/2026 12:56 AM, Nikunj A Dadhania wrote:
> Move FSGSBASE enablement from identify_cpu() to
> cpu_init_exception_handling() to ensure it is enabled before any exceptions
> can occur on both boot and secondary CPUs.
> 

It would be more accurate to say ".. before any exceptions that uses
paranoid_entry() can occur.."

I think early exceptions such #VC can still occur and the
bringup_idt_table is set up to handle those.

> == Background ==

...

> +	/*
> +	 * On CPUs with FSGSBASE support, paranoid_entry() uses
> +	 * ALTERNATIVE-patched RDGSBASE/WRGSBASE instructions. Secondary CPUs
> +	 * boot after alternatives are patched globally, so early exceptions
> +	 * execute patched code that depends on FSGSBASE. Enable the feature
> +	 * before any exceptions occur.


On similar lines. I suggest getting rid of the last line: "Enable the
feature before any exceptions occur." The rest looks fine to me.


> +	 */
> +	if (cpu_feature_enabled(X86_FEATURE_FSGSBASE)) {
> +		cr4_set_bits(X86_CR4_FSGSBASE);
> +		elf_hwcap2 |= HWCAP2_FSGSBASE;
> +	}
> +

Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>