From: Xin Li <xin@zytor.com>
To: "Michael Kelley" <mhklinux@outlook.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
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Subject: Re: [PATCH v4 01/15] x86/msr: Add missing includes of <asm/msr.h>
Date: Wed, 30 Apr 2025 02:12:19 -0700 [thread overview]
Message-ID: <d5b7edab-1872-45ff-8f2e-bcb34f6bdc23@zytor.com> (raw)
In-Reply-To: <SN6PR02MB4157EA2E3B827141588DA310D4832@SN6PR02MB4157.namprd02.prod.outlook.com>
On 4/29/2025 9:20 PM, Michael Kelley wrote:
>> Also under hyperv/ not all files are covered but I'm a bit hesitant to
>> suggest a change there since I'm not sure if they (hypervisors) do
>> something special w.r.t. msr.
> I've worked on the Hyper-V code in Linux for 8 years or so, first as
> a Microsoft employee, and more recently as a retiree. 🙂 I'm not
> aware of anything special w.r.t. MSR access for Hyper-V guests.
> All the normal Linux code for accessing MSRs just works. Hyper-V
> *does* provide a set of synthetic MSRs that are unique to
> Hyper-V, but they are also accessed using normal Linux code. Of
> course, at runtime the access to these synthetic MSRs always
> traps to the hypervisor.
>
> I'm planning to apply Xin Li's patch set and make sure nothing
> breaks for Hyper-V guests, and particularly when running as an
> SEV-SNP or TDX guest. Hopefully I can do that by early next week
> at the latest.
Hi Michael, I appreciate it!
next prev parent reply other threads:[~2025-04-30 9:13 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-27 9:20 [PATCH v4 00/15] MSR code cleanup part one Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 01/15] x86/msr: Add missing includes of <asm/msr.h> Xin Li (Intel)
2025-04-29 9:45 ` Ilpo Järvinen
2025-04-29 17:27 ` Xin Li
2025-04-30 4:20 ` Michael Kelley
2025-04-30 9:12 ` Xin Li [this message]
2025-04-30 8:41 ` Xin Li
2025-04-30 9:17 ` Ilpo Järvinen
2025-04-30 17:34 ` Xin Li
2025-05-01 5:42 ` [PATCH v4A " Xin Li (Intel)
2025-05-02 13:13 ` Ilpo Järvinen
2025-05-02 17:50 ` Xin Li
2025-04-27 9:20 ` [PATCH v4 02/15] x86/msr: Move rdtsc{,_ordered}() to <asm/tsc.h> Xin Li (Intel)
2025-05-02 8:02 ` Ingo Molnar
2025-05-02 18:09 ` Xin Li
2025-05-02 8:18 ` Ingo Molnar
2025-05-02 18:01 ` Xin Li
2025-05-02 8:52 ` Ingo Molnar
2025-05-02 18:00 ` Xin Li
2025-04-27 9:20 ` [PATCH v4 03/15] x86/msr: Remove rdpmc() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 04/15] x86/msr: Rename rdpmcl() to rdpmc() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 05/15] x86/msr: Convert the rdpmc() macro into an always inline function Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 06/15] x86/xen/msr: Return u64 consistently in Xen PMC read functions Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 07/15] x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 08/15] x86/msr: Add the native_rdmsrq() helper Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 09/15] x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 10/15] x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}() Xin Li (Intel)
2025-05-02 8:30 ` Ingo Molnar
2025-04-27 9:20 ` [PATCH v4 11/15] x86/xen/msr: Remove pmu_msr_{read,write}() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 12/15] x86/xen/msr: Remove the error pointer argument from set_seg() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 13/15] x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 14/15] x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low) Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 15/15] x86/msr: Change the function type of native_read_msr_safe() Xin Li (Intel)
2025-05-02 14:13 ` [PATCH v4 00/15] MSR code cleanup part one Michael Kelley
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