From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A140BE8FDC6 for ; Wed, 4 Oct 2023 03:27:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232115AbjJDD1o (ORCPT ); Tue, 3 Oct 2023 23:27:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229530AbjJDD1n (ORCPT ); Tue, 3 Oct 2023 23:27:43 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C94D0A7; Tue, 3 Oct 2023 20:27:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696390059; x=1727926059; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=XRzc40yKm8KEkXCsgor32yVzEZ5IsO0oazi7M7ukS0Y=; b=LR8H/OfurWuYvo9dBLe8CcgL/14OO1qa+77ZyhPEmZKLM/YhZAG9riU5 n3sGSbXvn9vLtdziOYv7Bn6DV5v3I0Cxh/U8tOFDoweIpyu3Pd1AAw09C ylrFaLpoVCeP9O35Swls7a4iktxd14YjuAZA/V1G6hz+Q+hyM/ma29aym etssJT5i9yRTysOa8DiCwiA5/nJpxc7ZEsRqdlXM5z8jjAhOm3V+BlvXG PwkQ8Rl+LBcmN5enJiLPcZEKDqJuGoJAKK4ze6O2QrEhBauIEzP/Ai4dY BOUEDQeikSui/NqPtzj0d2ZTsX2USoIy/o/JmgzUUdhjOXHR5lvZk+vS5 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10852"; a="373383521" X-IronPort-AV: E=Sophos;i="6.03,199,1694761200"; d="scan'208";a="373383521" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2023 20:27:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10852"; a="894762988" X-IronPort-AV: E=Sophos;i="6.03,199,1694761200"; d="scan'208";a="894762988" Received: from ddiaz-mobl4.amr.corp.intel.com (HELO [10.209.57.36]) ([10.209.57.36]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2023 20:26:12 -0700 Message-ID: Date: Tue, 3 Oct 2023 20:27:37 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH] x86: KVM: Add feature flag for AMD's FsGsKernelGsBaseNonSerializing Content-Language: en-US To: Jim Mattson Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Pawan Gupta , Jiaxi Chen , Kim Phillips , Paolo Bonzini , Sean Christopherson , "H. Peter Anvin" , x86@kernel.org, Dave Hansen , Borislav Petkov , Ingo Molnar , Thomas Gleixner References: <20231004002038.907778-1-jmattson@google.com> <01009a2a-929e-ce16-6f44-1d314e6bcba5@intel.com> From: Dave Hansen In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 10/3/23 19:44, Jim Mattson wrote: > I'm a little surprised at the pushback, TBH. Are you implying that > there is some advantage to *not* passing this bit through? I'm not really trying to push back. I'm honestly just curious. Linux obviously doesn't cat about the bit. So is this for some future Linux or some other OS?