From: K Prateek Nayak <kprateek.nayak@amd.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Jonathan Corbet <corbet@lwn.net>, <x86@kernel.org>
Cc: Naveen rao <naveen.rao@amd.com>,
Sairaj Kodilkar <sarunkod@amd.com>,
"H. Peter Anvin" <hpa@zytor.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
"Xin Li (Intel)" <xin@zytor.com>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
Mario Limonciello <mario.limonciello@amd.com>,
"Gautham R. Shenoy" <gautham.shenoy@amd.com>,
Babu Moger <babu.moger@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
<stable@vger.kernel.org>, Naveen N Rao <naveen@kernel.org>
Subject: Re: [PATCH v5 1/4] x86/cpu/topology: Always try cpu_parse_topology_ext() on AMD/Hygon
Date: Thu, 11 Sep 2025 11:36:30 +0530 [thread overview]
Message-ID: <e4a791dd-5189-4f32-a229-fa93ec9d9d5d@amd.com> (raw)
In-Reply-To: <8a4272f7-0d22-43f0-993b-6d53172b7f65@amd.com>
On 9/11/2025 10:07 AM, K Prateek Nayak wrote:
> /*
> - * In case leaf B is available, use it to derive
> - * topology information.
> + * If the extended topology leaf 0xb leaf doesn't exits,
> + * derive CORE and DIE information from the 0x8000001e leaf.
> */
> - err = detect_extended_topology(c);
> - if (!err)
> - c->x86_coreid_bits = get_count_order(c->x86_max_cores);
> + if (!has_extended_topology) {
> + c->cpu_die_id = ecx & 0xff;
Just noticed that we still need that "cpu_die_id" from 0x8000001e since
0xb on AMD does not implement the LEVEL_TYPE of DIE_TYPE (5).
> +
> + if (c->x86 >= 0x17) {
> + c->cpu_core_id = ebx & 0xff;
> +
> + if (smp_num_siblings > 1)
> + c->x86_max_cores /= smp_num_siblings;
> + }
> + }
--
Thanks and Regards,
Prateek
next prev parent reply other threads:[~2025-09-11 6:06 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-01 17:04 [PATCH v5 0/4] x86/cpu/topology: Fix the preferred order of initial APIC ID parsing on AMD/Hygon K Prateek Nayak
2025-09-01 17:04 ` [PATCH v5 1/4] x86/cpu/topology: Always try cpu_parse_topology_ext() " K Prateek Nayak
2025-09-10 20:10 ` Thomas Gleixner
2025-09-11 4:37 ` K Prateek Nayak
2025-09-11 6:06 ` K Prateek Nayak [this message]
2025-09-01 17:04 ` [PATCH v5 2/4] x86/cpu/topology: Check for X86_FEATURE_XTOPOLOGY instead of passing has_xtopology K Prateek Nayak
2025-09-01 17:04 ` [PATCH v5 3/4] x86/msr-index: Define AMD64_CPUID_FN_EXT MSR K Prateek Nayak
2025-09-10 17:49 ` Borislav Petkov
2025-09-01 17:04 ` [RFC PATCH v5 4/4] Documentation/x86/topology: Detail CPUID leaves used for topology enumeration K Prateek Nayak
2025-09-12 16:23 ` Borislav Petkov
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