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From: Paolo Bonzini <pbonzini@redhat.com>
To: Sean Christopherson <seanjc@google.com>,
	Mingwei Zhang <mizhang@google.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	kernel test robot <oliver.sang@intel.com>
Subject: Re: [PATCH 2/5] KVM: selftests: Only validate counts for hardware-supported arch events
Date: Mon, 20 Jan 2025 17:12:07 +0100	[thread overview]
Message-ID: <e939590d-c30a-4e00-be7c-584d4e80ec83@redhat.com> (raw)
In-Reply-To: <Z4r4UtpAIVe-EGeI@google.com>

On 1/18/25 01:39, Sean Christopherson wrote:
> On Sat, Jan 18, 2025, Mingwei Zhang wrote:
>> On Fri, Jan 17, 2025, Sean Christopherson wrote:
>>> @@ -582,18 +585,26 @@ static void test_intel_counters(void)
>>>   
>>>   	/*
>>>   	 * Detect the existence of events that aren't supported by selftests.
>>> -	 * This will (obviously) fail any time the kernel adds support for a
>>> -	 * new event, but it's worth paying that price to keep the test fresh.
>>> +	 * This will (obviously) fail any time hardware adds support for a new
>>> +	 * event, but it's worth paying that price to keep the test fresh.
>>>   	 */
>>>   	TEST_ASSERT(nr_arch_events <= NR_INTEL_ARCH_EVENTS,
>>>   		    "New architectural event(s) detected; please update this test (length = %u, mask = %x)",
>>> -		    nr_arch_events, kvm_cpu_property(X86_PROPERTY_PMU_EVENTS_MASK));
>>> +		    nr_arch_events, this_cpu_property(X86_PROPERTY_PMU_EVENTS_MASK));
>>
>> This is where it would make troubles for us (all companies that might be
>> using the selftest in upstream kernel and having a new hardware). In
>> this case when we get new hardware, the test will fail in the downstream
>> kernel. We will have to wait until the fix is ready, and backport it
>> downstream, re-test it.... It takes lots of extra work.
> 
> If Intel can't upstream what should be a *very* simple patch to enumerate the
> new encoding and its expected count in advance of hardware being shipped to
> partners, then we have bigger problems.

Conceptually I have bigger problems with people running stable kernels 
than people running on really really new hardware.

However the intersection of running a pretty old kernel on a very new 
bare metal x86 system is relatively small but nonzero (those pesky 
Debian users); it may happen with cloud instances but then the 
intersection of running old selftests in a nested virt environment is 
probably even smaller.

I am not too happy about the assertion, but it does seem like the lesser 
evil.

Paolo


  reply	other threads:[~2025-01-20 16:12 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-17 23:41 [PATCH 0/5] KVM: selftests: Fix PMC checks in PMU counters test Sean Christopherson
2025-01-17 23:41 ` [PATCH 1/5] KVM: selftests: Make Intel arch events globally available " Sean Christopherson
2025-01-17 23:42 ` [PATCH 2/5] KVM: selftests: Only validate counts for hardware-supported arch events Sean Christopherson
2025-01-18  0:06   ` Mingwei Zhang
2025-01-18  0:39     ` Sean Christopherson
2025-01-20 16:12       ` Paolo Bonzini [this message]
2025-01-22  4:51       ` Mingwei Zhang
2025-01-24 15:57         ` Sean Christopherson
2025-01-17 23:42 ` [PATCH 3/5] KVM: selftests: Remove dead code in Intel PMU counters test Sean Christopherson
2025-01-17 23:42 ` [PATCH 4/5] KVM: selftests: Drop the "feature event" param from guest test helpers Sean Christopherson
2025-01-17 23:42 ` [PATCH 5/5] KVM: selftests: Print out the actual Top-Down Slots count on failure Sean Christopherson
2025-01-20 16:17 ` [PATCH 0/5] KVM: selftests: Fix PMC checks in PMU counters test Paolo Bonzini
2025-02-10 23:38   ` Sean Christopherson
2025-02-15  0:50 ` Sean Christopherson

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