From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Zide Chen <zide.chen@intel.com>,
Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Jim Mattson <jmattson@google.com>,
Mingwei Zhang <mizhang@google.com>,
Das Sandipan <Sandipan.Das@amd.com>,
Shukla Manali <Manali.Shukla@amd.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH 1/3] KVM: x86/pmu: Do not map fixed counters >= 3 to generic perf events
Date: Tue, 24 Mar 2026 13:48:04 +0800 [thread overview]
Message-ID: <e94e4b40-11e4-4dce-adc7-6a9ce4993480@linux.intel.com> (raw)
In-Reply-To: <20260226230606.146532-2-zide.chen@intel.com>
On 2/27/2026 7:06 AM, Zide Chen wrote:
> Only fixed counters 0..2 have matching generic cross-platform
> hardware perf events (INSTRUCTIONS, CPU_CYCLES, REF_CPU_CYCLES).
> Therefore, perf_get_hw_event_config() is only applicable to these
> counters.
>
> KVM does not intend to emulate fixed counters >= 3 on legacy
> (non-mediated) vPMU, while for mediated vPMU, KVM does not care what
> the fixed counter event mappings are. Therefore, return 0 for their
> eventsel.
>
> Also remove __always_inline as BUILD_BUG_ON() is no longer needed.
>
> Signed-off-by: Zide Chen <zide.chen@intel.com>
> ---
> arch/x86/kvm/vmx/pmu_intel.c | 26 ++++++++++++++------------
> 1 file changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> index 27eb76e6b6a0..4bfd16a9e6c7 100644
> --- a/arch/x86/kvm/vmx/pmu_intel.c
> +++ b/arch/x86/kvm/vmx/pmu_intel.c
> @@ -454,28 +454,30 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> * different perf_event is already utilizing the requested counter, but the end
> * result is the same (ignoring the fact that using a general purpose counter
> * will likely exacerbate counter contention).
> - *
> - * Forcibly inlined to allow asserting on @index at build time, and there should
> - * never be more than one user.
> */
> -static __always_inline u64 intel_get_fixed_pmc_eventsel(unsigned int index)
> +static u64 intel_get_fixed_pmc_eventsel(unsigned int index)
> {
> const enum perf_hw_id fixed_pmc_perf_ids[] = {
> [0] = PERF_COUNT_HW_INSTRUCTIONS,
> [1] = PERF_COUNT_HW_CPU_CYCLES,
> [2] = PERF_COUNT_HW_REF_CPU_CYCLES,
> };
> - u64 eventsel;
> -
> - BUILD_BUG_ON(ARRAY_SIZE(fixed_pmc_perf_ids) != KVM_MAX_NR_INTEL_FIXED_COUNTERS);
> - BUILD_BUG_ON(index >= KVM_MAX_NR_INTEL_FIXED_COUNTERS);
> + u64 eventsel = 0;
I'm not sure if we can directly add the "slots" event support in the
perf_hw_id list. It looks more straightforward, but it need to involve perf
changes and impact all architectures. Not sure if it's worthy to do it.
Current way is fine for me if we decided not to support the fixed counter 3
for the legacy emulated vPMU.
Maybe one minor optimization, we can directly return here and then don't
need to add so much indents, e.g.,
if (index >=3)
return eventsel;
>
> /*
> - * Yell if perf reports support for a fixed counter but perf doesn't
> - * have a known encoding for the associated general purpose event.
> + * Fixed counters 3 and above don't have corresponding generic hardware
> + * perf event, and KVM does not intend to emulate them on non-mediated
> + * vPMU.
> */
> - eventsel = perf_get_hw_event_config(fixed_pmc_perf_ids[index]);
> - WARN_ON_ONCE(!eventsel && index < kvm_pmu_cap.num_counters_fixed);
> + if (index < 3) {
> + /*
> + * Yell if perf reports support for a fixed counter but perf
> + * doesn't have a known encoding for the associated general
> + * purpose event.
> + */
> + eventsel = perf_get_hw_event_config(fixed_pmc_perf_ids[index]);
> + WARN_ON_ONCE(!eventsel && index < kvm_pmu_cap.num_counters_fixed);
> + }
> return eventsel;
> }
>
next prev parent reply other threads:[~2026-03-24 5:48 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-26 23:06 [PATCH 0/3] KVM: x86/pmu: Add hardware Topdown metrics support Zide Chen
2026-02-26 23:06 ` [PATCH 1/3] KVM: x86/pmu: Do not map fixed counters >= 3 to generic perf events Zide Chen
2026-03-24 5:48 ` Mi, Dapeng [this message]
2026-03-27 20:53 ` Chen, Zide
2026-02-26 23:06 ` [PATCH 2/3] KVM: x86/pmu: Support Intel fixed counter 3 on mediated vPMU Zide Chen
2026-02-26 23:06 ` [PATCH 3/3] KVM: x86/pmu: Support PERF_METRICS MSR in " Zide Chen
2026-03-24 5:54 ` Mi, Dapeng
2026-03-27 20:23 ` Chen, Zide
2026-04-09 6:25 ` [PATCH 0/3] KVM: x86/pmu: Add hardware Topdown metrics support Mi, Dapeng
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