From: Sascha Bischoff <Sascha.Bischoff@arm.com>
To: "maz@kernel.org" <maz@kernel.org>
Cc: "yuzenghui@huawei.com" <yuzenghui@huawei.com>,
Timothy Hayes <Timothy.Hayes@arm.com>,
Suzuki Poulose <Suzuki.Poulose@arm.com>, nd <nd@arm.com>,
"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Joey Gouly <Joey.Gouly@arm.com>,
"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
"oliver.upton@linux.dev" <oliver.upton@linux.dev>
Subject: Re: [PATCH 02/32] KVM: arm64: gic-v3: Switch vGIC-v3 to use generated ICH_VMCR_EL2
Date: Mon, 15 Dec 2025 14:15:03 +0000 [thread overview]
Message-ID: <ece413c8b70e30f39052fb29371e9a75c239ff9e.camel@arm.com> (raw)
In-Reply-To: <86ldj4nesf.wl-maz@kernel.org>
On Mon, 2025-12-15 at 11:52 +0000, Marc Zyngier wrote:
> On Fri, 12 Dec 2025 15:22:35 +0000,
> Sascha Bischoff <Sascha.Bischoff@arm.com> wrote:
> >
> > From: Sascha Bischoff <Sascha.Bischoff@arm.com>
> >
> > /* EOImode == 0, nothing to be done here */
> > - if (!(vmcr & ICH_VMCR_EOIM_MASK))
> > + if (!FIELD_GET(ICH_VMCR_EL2_VEOIM_MASK, vmcr))
>
> nit: FIELD_GET() doesn't bring anything here. Similar comment applies
> to most 'if (val & MASK)' constructs that get changed here.
I've reverted all bare instances of `val & MASK` (without shifts) to
not use FIELD_GET(). Anything with an additional shift I've left as a
FIELD_GET().
> > static void __vgic_v3_read_igrpen0(struct kvm_vcpu *vcpu, u32
> > vmcr, int rt)
> > {
> > - vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG0_MASK));
> > + vcpu_set_reg(vcpu, rt,
> > !!FIELD_GET(ICH_VMCR_EL2_VENG0_MASK, vmcr));
>
> Here, !! is actually really superfluous and makes it harder to
> understand what is being done. Similar thing for IRGPEN1.
Dropped those !! as part of this change.
> Apart from these two points, this looks OK to me.
>
> Thanks,
>
> M.
Thanks,
Sascha
next prev parent reply other threads:[~2025-12-15 14:16 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-12 15:22 [PATCH 00/32] KVM: arm64: Introduce vGIC-v5 with PPI support Sascha Bischoff
2025-12-12 15:22 ` [PATCH 01/32] KVM: arm64: Account for RES1 bits in DECLARE_FEAT_MAP() and co Sascha Bischoff
2025-12-12 15:22 ` [PATCH 02/32] KVM: arm64: gic-v3: Switch vGIC-v3 to use generated ICH_VMCR_EL2 Sascha Bischoff
2025-12-15 11:52 ` Marc Zyngier
2025-12-15 14:15 ` Sascha Bischoff [this message]
2025-12-12 15:22 ` [PATCH 04/32] arm64/sysreg: Add remaining GICv5 ICC_ & ICH_ sysregs for KVM support Sascha Bischoff
2025-12-12 15:22 ` [PATCH 05/32] arm64/sysreg: Add GICR CDNMIA encoding Sascha Bischoff
2025-12-12 15:22 ` [PATCH 03/32] arm64/sysreg: Drop ICH_HFGRTR_EL2.ICC_HAPR_EL1 and make RES1 Sascha Bischoff
2025-12-12 15:22 ` [PATCH 08/32] KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE Sascha Bischoff
2025-12-12 15:22 ` [PATCH 06/32] KVM: arm64: gic-v5: Add ARM_VGIC_V5 device to KVM headers Sascha Bischoff
2025-12-12 15:22 ` [PATCH 07/32] KVM: arm64: gic: Introduce interrupt type helpers Sascha Bischoff
2025-12-15 13:32 ` Marc Zyngier
2025-12-15 16:01 ` Sascha Bischoff
2025-12-15 16:05 ` Marc Zyngier
2025-12-16 8:57 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 10/32] KVM: arm64: gic-v5: Add emulation for ICC_IAFFID_EL1 accesses Sascha Bischoff
2025-12-15 17:31 ` Marc Zyngier
2025-12-16 10:57 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 09/32] KVM: arm64: gic-v5: Compute GICv5 FGTs on vcpu load Sascha Bischoff
2025-12-12 16:24 ` Marc Zyngier
2025-12-15 17:37 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 11/32] KVM: arm64: gic-v5: Trap and emulate ICH_PPI_HMRx_EL1 accesses Sascha Bischoff
2025-12-16 10:41 ` Marc Zyngier
2025-12-16 11:54 ` Sascha Bischoff
2025-12-16 15:09 ` Marc Zyngier
2025-12-12 15:22 ` [PATCH 13/32] KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interface Sascha Bischoff
2025-12-17 11:07 ` Marc Zyngier
2025-12-17 21:42 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 12/32] KVM: arm64: gic: Set vgic_model before initing private IRQs Sascha Bischoff
2025-12-12 15:22 ` [PATCH 16/32] KVM: arm64: gic: Introduce irq_queue and set_pending_state to irq_ops Sascha Bischoff
2025-12-17 9:34 ` Marc Zyngier
2025-12-17 20:50 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 14/32] KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore Sascha Bischoff
2025-12-13 5:59 ` kernel test robot
2025-12-15 10:54 ` Sascha Bischoff
2025-12-13 8:05 ` kernel test robot
2025-12-22 16:52 ` kernel test robot
2025-12-12 15:22 ` [PATCH 15/32] KVM: arm64: gic-v5: Implement direct injection of PPIs Sascha Bischoff
2025-12-17 11:40 ` Marc Zyngier
2026-01-07 14:50 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 19/32] KVM: arm64: gic-v5: Init Private IRQs (PPIs) for GICv5 Sascha Bischoff
2025-12-17 17:13 ` Marc Zyngier
2025-12-12 15:22 ` [PATCH 18/32] KVM: arm64: gic-v5: Check for pending PPIs Sascha Bischoff
2025-12-17 11:49 ` Joey Gouly
2025-12-17 12:00 ` Joey Gouly
2025-12-18 8:17 ` Sascha Bischoff
2025-12-17 14:29 ` Marc Zyngier
2026-01-07 15:59 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 17/32] KVM: arm64: gic-v5: Implement PPI interrupt injection Sascha Bischoff
2025-12-17 10:33 ` Marc Zyngier
2025-12-17 21:10 ` Sascha Bischoff
2025-12-17 15:54 ` Joey Gouly
2026-01-07 16:28 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 21/32] KVM: arm64: gic-v5: Create, init vgic_v5 Sascha Bischoff
2025-12-12 15:22 ` [PATCH 22/32] KVM: arm64: gic-v5: Reset vcpu state Sascha Bischoff
2025-12-12 15:22 ` [PATCH 20/32] KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE Sascha Bischoff
2025-12-12 15:22 ` [PATCH 23/32] KVM: arm64: gic-v5: Bump arch timer for GICv5 Sascha Bischoff
2025-12-15 15:50 ` Marc Zyngier
2025-12-16 10:55 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 24/32] KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5 Sascha Bischoff
2025-12-12 15:22 ` [PATCH 25/32] KVM: arm64: gic: Hide GICv5 for protected guests Sascha Bischoff
2025-12-12 15:22 ` [PATCH 26/32] KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests Sascha Bischoff
2025-12-12 15:22 ` [PATCH 27/32] KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them Sascha Bischoff
2025-12-12 15:22 ` [PATCH 28/32] KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot Sascha Bischoff
2025-12-12 15:22 ` [PATCH 29/32] irqchip/gic-v5: Check if impl is virt capable Sascha Bischoff
2025-12-16 15:40 ` Lorenzo Pieralisi
2025-12-17 20:46 ` Sascha Bischoff
2025-12-12 15:22 ` [PATCH 30/32] KVM: arm64: gic-v5: Probe for GICv5 device Sascha Bischoff
2025-12-12 15:22 ` [PATCH 32/32] KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest Sascha Bischoff
2025-12-12 15:22 ` [PATCH 31/32] Documentation: KVM: Introduce documentation for VGICv5 Sascha Bischoff
2025-12-15 0:15 ` kernel test robot
2025-12-15 9:56 ` Peter Maydell
2025-12-15 13:01 ` Sascha Bischoff
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