From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-181.mta0.migadu.com (out-181.mta0.migadu.com [91.218.175.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C551A41 for ; Fri, 6 Jun 2025 00:16:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.181 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749168992; cv=none; b=hsLvsN/Jsy5lQnVHpJz4hcf1GUtxONAyjkGpbuOx94C0ZVLLiwdFRHxwLZv0mXWc5n2bLMLB0BC2XsLyGPT8szI1lJht6LZJLhSwdPkmYK3SzkC5Mv3484/5wWT1ydrjFAQ10L8TWBjap+xhx/hLeHN2qyWLWEh/KKTw9IgaPuQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749168992; c=relaxed/simple; bh=qBz0DAP8dAYLtjTcVjxkZ48FD+U+UYSQisUtfxn/zck=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=YlCKgsuM0nSFTTa66FyYvT/b4vDWUoNn5VSal95MFURgz5XUp8JSKsyr+rHFPR71LKAlS39Os0sMB7vBXum7o5mRFjPQny6ZAMfliPbi47hud47afKYWghrC15yGSiJuTg8GN0buy31FY3mdSfc+urMLG+dlkrZ6TJRH/2prYxU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=jOhpVxn4; arc=none smtp.client-ip=91.218.175.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="jOhpVxn4" Message-ID: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1749168988; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+xPywf03yDNkYEegcXCgoSVQ8qSRx8kshKocy4LVVsM=; b=jOhpVxn4e1YZ6YRTUuacO44l3FJVVuTv6wv1IJDDzKnIXkBhX4W29RIyrnrXhS7TchjIa4 gVVLMZ/Xjc1siqRtZxtV1k4yYPl5YHtL+DRDh0PkDHHJNiZNKEc1IiTlyNYL+OepkPTaOK g/0I8UWEEhM6ek3EHxaksSLp6Vo375I= Date: Thu, 5 Jun 2025 17:16:22 -0700 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH 03/13] RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Andrew Jones , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20250605061458.196003-1-apatel@ventanamicro.com> <20250605061458.196003-4-apatel@ventanamicro.com> Content-Language: en-US X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Atish Patra In-Reply-To: <20250605061458.196003-4-apatel@ventanamicro.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Migadu-Flow: FLOW_OUT On 6/4/25 11:14 PM, Anup Patel wrote: > The kvm_riscv_vcpu_alloc_vector_context() does return an error code > upon failure so don't ignore this in kvm_arch_vcpu_create(). currently, kvm_riscv_vcpu_alloc_vector_context returns -ENOMEM only. Do you have some plans to return different errors in the future ? Otherwise, the code remains same before and after. > Signed-off-by: Anup Patel > --- > arch/riscv/kvm/vcpu.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c > index e0a01af426ff..6a1914b21ec3 100644 > --- a/arch/riscv/kvm/vcpu.c > +++ b/arch/riscv/kvm/vcpu.c > @@ -148,8 +148,10 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) > > spin_lock_init(&vcpu->arch.reset_state.lock); > > - if (kvm_riscv_vcpu_alloc_vector_context(vcpu)) > - return -ENOMEM; > + /* Setup VCPU vector context */ The function name is pretty self explanatory. So no need of this comment ? > + rc = kvm_riscv_vcpu_alloc_vector_context(vcpu); > + if (rc) > + return rc; > > /* Setup VCPU timer */ > kvm_riscv_vcpu_timer_init(vcpu);