From: "Huang, Kai" <kai.huang@intel.com>
To: "pbonzini@redhat.com" <pbonzini@redhat.com>,
"seanjc@google.com" <seanjc@google.com>,
"nikunj@amd.com" <nikunj@amd.com>
Cc: "thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"santosh.shukla@amd.com" <santosh.shukla@amd.com>,
"bp@alien8.de" <bp@alien8.de>
Subject: Re: [PATCH v5 7/8] KVM: SVM: Add Page modification logging support
Date: Wed, 14 Jan 2026 23:10:55 +0000 [thread overview]
Message-ID: <f0a1813c8473e8ecdf2b7826559ae1e37ee1cd2a.camel@intel.com> (raw)
In-Reply-To: <2669381c-ddbf-4cb2-a770-8308cd5ff353@amd.com>
On Wed, 2026-01-14 at 19:33 +0530, Nikunj A. Dadhania wrote:
> > > @@ -748,12 +748,19 @@ static void nested_vmcb02_prepare_control(struct vcpu_svm *svm,
> > > V_NMI_BLOCKING_MASK);
> > > }
> > >
> > > - /* Copied from vmcb01. msrpm_base can be overwritten later. */
> > > + /* Copied from vmcb01. msrpm_base/nested_ctl can be overwritten later. */
> > > vmcb02->control.nested_ctl = vmcb01->control.nested_ctl;
> > > vmcb02->control.iopm_base_pa = vmcb01->control.iopm_base_pa;
> > > vmcb02->control.msrpm_base_pa = vmcb01->control.msrpm_base_pa;
> > > vmcb_mark_dirty(vmcb02, VMCB_PERM_MAP);
> > >
> > > + /* Disable PML for nested guest as the A/D update is emulated by MMU */
> >
> > This comment isn't accurate to me. I think the key reason is, for L2 if
> > PML enabled the recorded GPA will be L2's GPA, but not L1's.
> >
> > Please update the comment if a new version is needed?
>
> How about the below:
>
> + /*
> + * Disable PML for nested guests. When L2 runs with PML enabled, the
> + * CPU logs L2 GPAs rather than L1 GPAs, breaking dirty page tracking
> + * for the L0 hypervisor.
> + */
LGTM.
next prev parent reply other threads:[~2026-01-14 23:10 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-05 6:36 [PATCH v5 0/8] KVM: SVM: Add Page Modification Logging (PML) support Nikunj A Dadhania
2026-01-05 6:36 ` [PATCH v5 1/8] KVM: x86: Carve out PML flush routine Nikunj A Dadhania
2026-01-12 10:02 ` Huang, Kai
2026-01-14 13:57 ` Nikunj A. Dadhania
2026-01-05 6:36 ` [PATCH v5 2/8] KVM: x86: Move PML page to common vcpu arch structure Nikunj A Dadhania
2026-01-12 10:07 ` Huang, Kai
2026-01-05 6:36 ` [PATCH v5 3/8] KVM: VMX: Use cpu_dirty_log_size instead of enable_pml for PML checks Nikunj A Dadhania
2026-01-05 6:49 ` Gupta, Pankaj
2026-01-05 6:36 ` [PATCH v5 4/8] KVM: x86: Move nested CPU dirty logging logic to common code Nikunj A Dadhania
2026-01-12 10:08 ` Huang, Kai
2026-01-05 6:36 ` [PATCH v5 5/8] x86/cpufeatures: Add Page modification logging Nikunj A Dadhania
2026-01-05 6:36 ` [PATCH v5 6/8] KVM: SVM: Use BIT_ULL for 64-bit nested_ctl bit definitions Nikunj A Dadhania
2026-01-05 6:36 ` [PATCH v5 7/8] KVM: SVM: Add Page modification logging support Nikunj A Dadhania
2026-01-12 10:24 ` Huang, Kai
2026-01-14 14:03 ` Nikunj A. Dadhania
2026-01-14 23:10 ` Huang, Kai [this message]
2026-01-14 22:48 ` Huang, Kai
2026-01-16 4:12 ` Nikunj A. Dadhania
2026-01-05 6:36 ` [PATCH v5 8/8] selftests: KVM: x86: Add SEV PML dirty logging test Nikunj A Dadhania
2026-01-14 11:36 ` Huang, Kai
2026-01-14 14:27 ` Nikunj A. Dadhania
2026-01-14 22:44 ` Huang, Kai
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