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([2001:b07:add:ec09:c399:bc87:7b6c:fb2a]) by smtp.googlemail.com with ESMTPSA id eg35-20020a05640228a300b004638ba0ea96sm2998079edb.97.2022.11.02.06.40.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Nov 2022 06:40:20 -0700 (PDT) Message-ID: Date: Wed, 2 Nov 2022 14:40:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.0 Subject: Re: [PATCH v2 1/5] perf/x86/intel/lbr: use setup_clear_cpu_cap instead of clear_cpu_cap Content-Language: en-US To: Borislav Petkov , Maxim Levitsky Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Pawan Gupta , Ingo Molnar , Josh Poimboeuf , Namhyung Kim , Tony Luck , "H. Peter Anvin" , Arnaldo Carvalho de Melo , Thomas Gleixner , Alexander Shishkin , Tim Chen , "David S. Miller" , Dave Hansen , "Chang S. Bae" , Jane Malalane , Kees Cook , Kan Liang , Peter Zijlstra , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Herbert Xu , Jiri Olsa , Mark Rutland , linux-perf-users@vger.kernel.org, "open list:CRYPTO API" References: <20220718141123.136106-1-mlevitsk@redhat.com> <20220718141123.136106-2-mlevitsk@redhat.com> From: Paolo Bonzini In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 10/20/22 10:59, Borislav Petkov wrote: > On Wed, Sep 28, 2022 at 01:49:34PM +0300, Maxim Levitsky wrote: >> Patch 5 is the main fix - it makes the kernel to be tolerant to a >> broken CPUID config (coming hopefully from hypervisor), where you have >> a feature (AVX2 in my case) but not a feature on which this feature >> depends (AVX). > > I really really don't like it when people are fixing the wrong thing. > > Why does the kernel need to get fixed when something else can't get its > CPUID dependencies straight? I don't even want to know why something > would set AVX2 without AVX?!?! Users do so because they just "disable AVX" (e.g. in QEMU -cpu host,-avx) and that removes the AVX bit. Userspace didn't bother to implement the whole set of CPUID bit dependencies for AVX because: 1) Intel is adding AVX features every other week and probably half the time people would forget to add the dependency 2) anyway you absolutely need to check XCR0 before using AVX, which in the kernel is done using cpu_has_xfeatures(XFEATURE_MASK_YMM), and userspace *does* remove the XSAVE state from 0Dh leaf if you remove AVX. (2) in particular holds even on bare metal. The kernel bug here is that X86_FEATURE_AVX only tells you if the instructions are _present_, not if they are _usable_. Indeed, the XCR0 check is present for all other files in arch/x86/crypto, either instead or in addition to boot_cpu_has(X86_FEATURE_AVX). Maxim had sent a patch about a year ago to do it in aesni-intel-glue.c but Dave told him to fix the dependencies instead (https://lore.kernel.org/all/20211103124614.499580-1-mlevitsk@redhat.com/). What do you think of applying that patch instead? Thanks, Paolo