From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bandan Das Subject: Re: [PATCH v1 2/2] KVM: VMX: always require WB memory type for EPT Date: Thu, 10 Aug 2017 15:40:32 -0400 Message-ID: References: <20170810133512.13442-1-david@redhat.com> <20170810133512.13442-3-david@redhat.com> Mime-Version: 1.0 Content-Type: text/plain Cc: kvm@vger.kernel.org, Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= To: David Hildenbrand Return-path: Received: from mx1.redhat.com ([209.132.183.28]:46908 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752792AbdHJTkh (ORCPT ); Thu, 10 Aug 2017 15:40:37 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5B72F53620 for ; Thu, 10 Aug 2017 19:40:37 +0000 (UTC) In-Reply-To: <20170810133512.13442-3-david@redhat.com> (David Hildenbrand's message of "Thu, 10 Aug 2017 15:35:12 +0200") Sender: kvm-owner@vger.kernel.org List-ID: David Hildenbrand writes: > We already always set that type but don't check if it is supported. Also > for nVMX, we only support WB for now. Let's just require it. Out of curiosity, is there old hardware that supports ept but not WB ? Bandan > Signed-off-by: David Hildenbrand > --- > arch/x86/kvm/vmx.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index f6638ed..023c6dc 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -1200,6 +1200,11 @@ static inline bool cpu_has_vmx_ept_4levels(void) > return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT; > } > > +static inline bool cpu_has_vmx_ept_mt_wb(void) > +{ > + return vmx_capability.ept & VMX_EPTP_WB_BIT; > +} > + > static inline bool cpu_has_vmx_ept_ad_bits(void) > { > return vmx_capability.ept & VMX_EPT_AD_BIT; > @@ -4302,7 +4307,6 @@ static u64 construct_eptp(struct kvm_vcpu *vcpu, unsigned long root_hpa) > { > u64 eptp = VMX_EPTP_MT_WB | VMX_EPTP_PWL_4; > > - /* TODO write the value reading from MSR */ > if (enable_ept_ad_bits && > (!is_guest_mode(vcpu) || nested_ept_ad_enabled(vcpu))) > eptp |= VMX_EPTP_AD_ENABLE_BIT; > @@ -6638,7 +6642,8 @@ static __init int hardware_setup(void) > init_vmcs_shadow_fields(); > > if (!cpu_has_vmx_ept() || > - !cpu_has_vmx_ept_4levels()) { > + !cpu_has_vmx_ept_4levels() || > + !cpu_has_vmx_ept_mt_wb()) { > enable_ept = 0; > enable_unrestricted_guest = 0; > enable_ept_ad_bits = 0;