From: Bandan Das <bsd@redhat.com>
To: Jintack Lim <jintack@cs.columbia.edu>
Cc: christoffer.dall@linaro.org, marc.zyngier@arm.com,
pbonzini@redhat.com, rkrcmar@redhat.com, linux@armlinux.org.uk,
catalin.marinas@arm.com, will.deacon@arm.com,
vladimir.murzin@arm.com, suzuki.poulose@arm.com,
mark.rutland@arm.com, james.morse@arm.com,
lorenzo.pieralisi@arm.com, kevin.brodsky@arm.com,
wcohen@redhat.com, shankerd@codeaurora.org, geoff@infradead.org,
andre.przywara@arm.com, eric.auger@redhat.com,
anna-maria@linutronix.de, shihwei@cs.columbia.edu,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [RFC 07/55] KVM: arm/arm64: Add virtual EL2 state emulation framework
Date: Thu, 01 Jun 2017 16:05:49 -0400 [thread overview]
Message-ID: <jpg37bj1nj6.fsf@linux.bootlegged.copy> (raw)
In-Reply-To: <1483943091-1364-8-git-send-email-jintack@cs.columbia.edu> (Jintack Lim's message of "Mon, 9 Jan 2017 01:24:03 -0500")
Jintack Lim <jintack@cs.columbia.edu> writes:
...
> +/**
> + * kvm_arm_setup_shadow_state -- prepare shadow state based on emulated mode
> + * @vcpu: The VCPU pointer
> + */
> +void kvm_arm_setup_shadow_state(struct kvm_vcpu *vcpu)
> +{
> + struct kvm_cpu_context *ctxt = &vcpu->arch.ctxt;
> +
> + ctxt->hw_pstate = *vcpu_cpsr(vcpu);
> + ctxt->hw_sys_regs = ctxt->sys_regs;
> + ctxt->hw_sp_el1 = ctxt->gp_regs.sp_el1;
> +}
> +
> +/**
> + * kvm_arm_restore_shadow_state -- write back shadow state from guest
> + * @vcpu: The VCPU pointer
> + */
> +void kvm_arm_restore_shadow_state(struct kvm_vcpu *vcpu)
> +{
> + struct kvm_cpu_context *ctxt = &vcpu->arch.ctxt;
> +
> + *vcpu_cpsr(vcpu) = ctxt->hw_pstate;
> + ctxt->gp_regs.sp_el1 = ctxt->hw_sp_el1;
> +}
> +
> +void kvm_arm_init_cpu_context(kvm_cpu_context_t *cpu_ctxt)
> +{
> + cpu_ctxt->hw_sys_regs = &cpu_ctxt->sys_regs[0];
> +}
IIUC, the *_shadow_state() functions will set hw_* pointers to
either point to the "real" state or the shadow state to manage L2 ?
Maybe, it might make sense to make these function names a little more
generic since they are not dealing with setting the shadow state
alone.
> diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/arm64/kvm/hyp/sysreg-sr.c
> index 9341376..f2a1b32 100644
> --- a/arch/arm64/kvm/hyp/sysreg-sr.c
> +++ b/arch/arm64/kvm/hyp/sysreg-sr.c
> @@ -19,6 +19,7 @@
> #include <linux/kvm_host.h>
>
> #include <asm/kvm_asm.h>
> +#include <asm/kvm_emulate.h>
> #include <asm/kvm_hyp.h>
>
> /* Yes, this does nothing, on purpose */
> @@ -33,37 +34,41 @@ static void __hyp_text __sysreg_do_nothing(struct kvm_cpu_context *ctxt) { }
>
> static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
> {
> - ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1);
> - ctxt->sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0);
> - ctxt->sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0);
> - ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1);
> - ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1);
> + u64 *sys_regs = kern_hyp_va(ctxt->hw_sys_regs);
> +
> + sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1);
> + sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0);
> + sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0);
> + sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1);
> + sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1);
> ctxt->gp_regs.regs.sp = read_sysreg(sp_el0);
> ctxt->gp_regs.regs.pc = read_sysreg_el2(elr);
> - ctxt->gp_regs.regs.pstate = read_sysreg_el2(spsr);
> + ctxt->hw_pstate = read_sysreg_el2(spsr);
> }
>
> static void __hyp_text __sysreg_save_state(struct kvm_cpu_context *ctxt)
> {
> - ctxt->sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2);
> - ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1);
> - ctxt->sys_regs[SCTLR_EL1] = read_sysreg_el1(sctlr);
> - ctxt->sys_regs[CPACR_EL1] = read_sysreg_el1(cpacr);
> - ctxt->sys_regs[TTBR0_EL1] = read_sysreg_el1(ttbr0);
> - ctxt->sys_regs[TTBR1_EL1] = read_sysreg_el1(ttbr1);
> - ctxt->sys_regs[TCR_EL1] = read_sysreg_el1(tcr);
> - ctxt->sys_regs[ESR_EL1] = read_sysreg_el1(esr);
> - ctxt->sys_regs[AFSR0_EL1] = read_sysreg_el1(afsr0);
> - ctxt->sys_regs[AFSR1_EL1] = read_sysreg_el1(afsr1);
> - ctxt->sys_regs[FAR_EL1] = read_sysreg_el1(far);
> - ctxt->sys_regs[MAIR_EL1] = read_sysreg_el1(mair);
> - ctxt->sys_regs[VBAR_EL1] = read_sysreg_el1(vbar);
> - ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg_el1(contextidr);
> - ctxt->sys_regs[AMAIR_EL1] = read_sysreg_el1(amair);
> - ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg_el1(cntkctl);
> - ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1);
> -
> - ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1);
> + u64 *sys_regs = kern_hyp_va(ctxt->hw_sys_regs);
> +
> + sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2);
> + sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1);
> + sys_regs[SCTLR_EL1] = read_sysreg_el1(sctlr);
> + sys_regs[CPACR_EL1] = read_sysreg_el1(cpacr);
> + sys_regs[TTBR0_EL1] = read_sysreg_el1(ttbr0);
> + sys_regs[TTBR1_EL1] = read_sysreg_el1(ttbr1);
> + sys_regs[TCR_EL1] = read_sysreg_el1(tcr);
> + sys_regs[ESR_EL1] = read_sysreg_el1(esr);
> + sys_regs[AFSR0_EL1] = read_sysreg_el1(afsr0);
> + sys_regs[AFSR1_EL1] = read_sysreg_el1(afsr1);
> + sys_regs[FAR_EL1] = read_sysreg_el1(far);
> + sys_regs[MAIR_EL1] = read_sysreg_el1(mair);
> + sys_regs[VBAR_EL1] = read_sysreg_el1(vbar);
> + sys_regs[CONTEXTIDR_EL1] = read_sysreg_el1(contextidr);
> + sys_regs[AMAIR_EL1] = read_sysreg_el1(amair);
> + sys_regs[CNTKCTL_EL1] = read_sysreg_el1(cntkctl);
> + sys_regs[PAR_EL1] = read_sysreg(par_el1);
> +
> + ctxt->hw_sp_el1 = read_sysreg(sp_el1);
> ctxt->gp_regs.elr_el1 = read_sysreg_el1(elr);
> ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(spsr);
> }
> @@ -86,37 +91,41 @@ void __hyp_text __sysreg_save_guest_state(struct kvm_cpu_context *ctxt)
>
> static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)
> {
> - write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1);
> - write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0);
> - write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0);
> - write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1);
> - write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1);
> + u64 *sys_regs = kern_hyp_va(ctxt->hw_sys_regs);
> +
> + write_sysreg(sys_regs[ACTLR_EL1], actlr_el1);
> + write_sysreg(sys_regs[TPIDR_EL0], tpidr_el0);
> + write_sysreg(sys_regs[TPIDRRO_EL0], tpidrro_el0);
> + write_sysreg(sys_regs[TPIDR_EL1], tpidr_el1);
> + write_sysreg(sys_regs[MDSCR_EL1], mdscr_el1);
> write_sysreg(ctxt->gp_regs.regs.sp, sp_el0);
> write_sysreg_el2(ctxt->gp_regs.regs.pc, elr);
> - write_sysreg_el2(ctxt->gp_regs.regs.pstate, spsr);
> + write_sysreg_el2(ctxt->hw_pstate, spsr);
> }
>
> static void __hyp_text __sysreg_restore_state(struct kvm_cpu_context *ctxt)
> {
> - write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2);
> - write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1);
> - write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1], sctlr);
> - write_sysreg_el1(ctxt->sys_regs[CPACR_EL1], cpacr);
> - write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1], ttbr0);
> - write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1], ttbr1);
> - write_sysreg_el1(ctxt->sys_regs[TCR_EL1], tcr);
> - write_sysreg_el1(ctxt->sys_regs[ESR_EL1], esr);
> - write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1], afsr0);
> - write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1], afsr1);
> - write_sysreg_el1(ctxt->sys_regs[FAR_EL1], far);
> - write_sysreg_el1(ctxt->sys_regs[MAIR_EL1], mair);
> - write_sysreg_el1(ctxt->sys_regs[VBAR_EL1], vbar);
> - write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],contextidr);
> - write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1], amair);
> - write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1], cntkctl);
> - write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1);
> -
> - write_sysreg(ctxt->gp_regs.sp_el1, sp_el1);
> + u64 *sys_regs = kern_hyp_va(ctxt->hw_sys_regs);
> +
> + write_sysreg(sys_regs[MPIDR_EL1], vmpidr_el2);
> + write_sysreg(sys_regs[CSSELR_EL1], csselr_el1);
> + write_sysreg_el1(sys_regs[SCTLR_EL1], sctlr);
> + write_sysreg_el1(sys_regs[CPACR_EL1], cpacr);
> + write_sysreg_el1(sys_regs[TTBR0_EL1], ttbr0);
> + write_sysreg_el1(sys_regs[TTBR1_EL1], ttbr1);
> + write_sysreg_el1(sys_regs[TCR_EL1], tcr);
> + write_sysreg_el1(sys_regs[ESR_EL1], esr);
> + write_sysreg_el1(sys_regs[AFSR0_EL1], afsr0);
> + write_sysreg_el1(sys_regs[AFSR1_EL1], afsr1);
> + write_sysreg_el1(sys_regs[FAR_EL1], far);
> + write_sysreg_el1(sys_regs[MAIR_EL1], mair);
> + write_sysreg_el1(sys_regs[VBAR_EL1], vbar);
> + write_sysreg_el1(sys_regs[CONTEXTIDR_EL1], contextidr);
> + write_sysreg_el1(sys_regs[AMAIR_EL1], amair);
> + write_sysreg_el1(sys_regs[CNTKCTL_EL1], cntkctl);
> + write_sysreg(sys_regs[PAR_EL1], par_el1);
> +
> + write_sysreg(ctxt->hw_sp_el1, sp_el1);
> write_sysreg_el1(ctxt->gp_regs.elr_el1, elr);
> write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],spsr);
> }
next prev parent reply other threads:[~2017-06-01 20:05 UTC|newest]
Thread overview: 115+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-09 6:23 [RFC 00/55] Nested Virtualization on KVM/ARM Jintack Lim
2017-01-09 6:23 ` [RFC 01/55] arm64: Add missing TCR hw defines Jintack Lim
2017-01-09 6:23 ` [RFC 02/55] KVM: arm64: Add nesting config option Jintack Lim
2017-01-09 6:23 ` [RFC 03/55] KVM: arm64: Add KVM nesting feature Jintack Lim
2017-01-09 6:24 ` [RFC 04/55] KVM: arm64: Allow userspace to set PSR_MODE_EL2x Jintack Lim
2017-01-09 6:24 ` [RFC 05/55] KVM: arm64: Add vcpu_mode_el2 primitive to support nesting Jintack Lim
2017-01-09 6:24 ` [RFC 06/55] KVM: arm64: Add EL2 execution context for nesting Jintack Lim
2017-02-22 11:10 ` Christoffer Dall
2017-06-26 14:33 ` Jintack Lim
2017-07-03 9:03 ` Christoffer Dall
2017-07-03 9:32 ` Marc Zyngier
2017-07-03 9:54 ` Christoffer Dall
2017-07-03 14:44 ` Jintack Lim
2017-07-03 15:30 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 07/55] KVM: arm/arm64: Add virtual EL2 state emulation framework Jintack Lim
2017-02-22 11:12 ` Christoffer Dall
2017-06-01 20:05 ` Bandan Das [this message]
2017-06-02 11:51 ` Christoffer Dall
2017-06-02 17:36 ` Bandan Das
2017-06-02 19:06 ` Christoffer Dall
2017-06-02 19:25 ` Bandan Das
[not found] ` <20170602194353.GG397@cbox>
2017-06-02 20:18 ` Bandan Das
2017-06-02 21:15 ` Christoffer Dall
2017-06-02 23:49 ` Bandan Das
2017-01-09 6:24 ` [RFC 08/55] KVM: arm64: Set virtual EL2 context depending on the guest exception level Jintack Lim
2017-02-22 11:14 ` Christoffer Dall
2017-06-01 20:22 ` Bandan Das
2017-06-02 8:48 ` Marc Zyngier
2017-01-09 6:24 ` [RFC 09/55] KVM: arm64: Set shadow EL1 registers for virtual EL2 execution Jintack Lim
2017-02-22 11:19 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 10/55] KVM: arm64: Synchronize EL1 system registers on virtual EL2 entry and exit Jintack Lim
2017-06-06 20:16 ` Bandan Das
2017-06-07 4:26 ` Jintack Lim
2017-01-09 6:24 ` [RFC 11/55] KVM: arm64: Emulate taking an exception to the guest hypervisor Jintack Lim
2017-02-22 11:28 ` Christoffer Dall
2017-06-06 20:21 ` Bandan Das
2017-06-06 20:38 ` Jintack Lim
2017-06-06 22:07 ` Bandan Das
2017-06-06 23:16 ` Jintack Lim
2017-06-07 17:21 ` Bandan Das
2017-01-09 6:24 ` [RFC 12/55] KVM: arm64: Handle EL2 register access traps Jintack Lim
2017-02-22 11:30 ` Christoffer Dall
2017-02-22 11:31 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 13/55] KVM: arm64: Handle eret instruction traps Jintack Lim
2017-01-09 6:24 ` [RFC 14/55] KVM: arm64: Take account of system " Jintack Lim
2017-02-22 11:34 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 15/55] KVM: arm64: Trap EL1 VM register accesses in virtual EL2 Jintack Lim
2017-01-09 6:24 ` [RFC 16/55] KVM: arm64: Forward VM reg traps to the guest hypervisor Jintack Lim
2017-02-22 11:39 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 17/55] KVM: arm64: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 in virtual EL2 Jintack Lim
2017-02-22 11:40 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 18/55] KVM: arm64: Forward traps due to HCR_EL2.NV1 bit to the guest hypervisor Jintack Lim
2017-02-22 11:41 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 19/55] KVM: arm64: Trap CPACR_EL1 access in virtual EL2 Jintack Lim
2017-01-09 6:24 ` [RFC 20/55] KVM: arm64: Forward CPACR_EL1 traps to the guest hypervisor Jintack Lim
2017-01-09 6:24 ` [RFC 21/55] KVM: arm64: Forward HVC instruction " Jintack Lim
2017-02-22 11:47 ` Christoffer Dall
2017-06-26 15:21 ` Jintack Lim
2017-07-03 9:08 ` Christoffer Dall
2017-07-03 9:31 ` Andrew Jones
2017-07-03 9:51 ` Christoffer Dall
2017-07-03 12:03 ` Will Deacon
2017-07-03 12:35 ` Marc Zyngier
2017-07-03 13:29 ` Jintack Lim
2017-01-09 6:24 ` [RFC 22/55] KVM: arm64: Handle PSCI call from the guest Jintack Lim
2017-01-09 6:24 ` [RFC 23/55] KVM: arm64: Forward WFX to the guest hypervisor Jintack Lim
2017-01-09 6:24 ` [RFC 24/55] KVM: arm64: Forward FP exceptions " Jintack Lim
2017-01-09 6:24 ` [RFC 25/55] KVM: arm/arm64: Let vcpu thread modify its own active state Jintack Lim
2017-02-22 12:27 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 26/55] KVM: arm/arm64: Add VGIC data structures for the nesting Jintack Lim
2017-01-09 6:24 ` [RFC 27/55] KVM: arm/arm64: Emulate GICH interface on GICv2 Jintack Lim
2017-02-22 13:06 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 28/55] KVM: arm/arm64: Prepare vgic state for the nested VM Jintack Lim
2017-02-22 13:12 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 29/55] KVM: arm/arm64: Set up the prepared vgic state Jintack Lim
2017-01-09 6:24 ` [RFC 30/55] KVM: arm/arm64: Inject irqs to the guest hypervisor Jintack Lim
2017-02-22 13:16 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 31/55] KVM: arm/arm64: Inject maintenance interrupts " Jintack Lim
2017-02-22 13:19 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 32/55] KVM: arm/arm64: register GICH iodev for " Jintack Lim
2017-02-22 13:21 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 33/55] KVM: arm/arm64: Remove unused params in mmu functions Jintack Lim
2017-01-09 6:24 ` [RFC 34/55] KVM: arm/arm64: Abstract stage-2 MMU state into a separate structure Jintack Lim
2017-01-09 6:24 ` [RFC 35/55] KVM: arm/arm64: Support mmu for the virtual EL2 execution Jintack Lim
2017-02-22 13:38 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 36/55] KVM: arm64: Invalidate virtual EL2 TLB entries when needed Jintack Lim
2017-01-09 6:24 ` [RFC 37/55] KVM: arm64: Setup vttbr_el2 on each VM entry Jintack Lim
2017-01-09 6:24 ` [RFC 38/55] KVM: arm/arm64: Make mmu functions non-static Jintack Lim
2017-01-09 6:24 ` [RFC 39/55] KVM: arm/arm64: Add mmu context for the nesting Jintack Lim
2017-02-22 13:34 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 40/55] KVM: arm/arm64: Handle vttbr_el2 write operation from the guest hypervisor Jintack Lim
2017-02-22 17:59 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 41/55] KVM: arm/arm64: Unmap/flush shadow stage 2 page tables Jintack Lim
2017-02-22 18:09 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 42/55] KVM: arm64: Implement nested Stage-2 page table walk logic Jintack Lim
2017-01-09 6:24 ` [RFC 43/55] KVM: arm/arm64: Handle shadow stage 2 page faults Jintack Lim
2017-01-09 6:24 ` [RFC 44/55] KVM: arm/arm64: Move kvm_is_write_fault to header file Jintack Lim
2017-01-09 6:24 ` [RFC 45/55] KVM: arm64: KVM: Inject stage-2 page faults Jintack Lim
2017-01-09 6:24 ` [RFC 46/55] KVM: arm64: Add more info to the S2 translation result Jintack Lim
2017-01-09 6:24 ` [RFC 47/55] KVM: arm/arm64: Forward the guest hypervisor's stage 2 permission faults Jintack Lim
2017-02-22 18:15 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 48/55] KVM: arm64: Emulate TLBI instruction Jintack Lim
2017-01-09 6:24 ` [RFC 49/55] KVM: arm64: Fixes to toggle_cache for nesting Jintack Lim
2017-01-09 6:24 ` [RFC 50/55] KVM: arm/arm64: Abstract kvm_phys_addr_ioremap() function Jintack Lim
2017-01-09 6:24 ` [RFC 51/55] KVM: arm64: Expose physical address of vcpu interface Jintack Lim
2017-01-09 6:24 ` [RFC 52/55] KVM: arm/arm64: Create a vcpu mapping for the nested VM Jintack Lim
2017-01-09 6:24 ` [RFC 53/55] KVM: arm64: Reflect shadow VMPIDR_EL2 value to MPIDR_EL1 Jintack Lim
2017-01-09 6:24 ` [RFC 54/55] KVM: arm/arm64: Adjust virtual offset considering nesting Jintack Lim
2017-02-22 19:28 ` Christoffer Dall
2017-01-09 6:24 ` [RFC 55/55] KVM: arm64: Enable nested virtualization Jintack Lim
2017-01-09 15:05 ` [RFC 00/55] Nested Virtualization on KVM/ARM David Hildenbrand
2017-01-10 16:18 ` Jintack Lim
2017-02-22 18:23 ` Christoffer Dall
2017-02-24 10:08 ` Jintack Lim
2017-02-24 10:28 ` Jintack Lim
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