From mboxrd@z Thu Jan 1 00:00:00 1970 From: ebiederm@xmission.com (Eric W. Biederman) Subject: Re: [PATCH v3] enable x2APIC without interrupt remapping under KVM Date: Tue, 30 Jun 2009 12:36:01 -0700 Message-ID: References: <20090629132926.GB20289@redhat.com> <20090630092623.GI20289@redhat.com> <4A4A476C.2070305@redhat.com> <4A4A6499.9000406@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Gleb Natapov , "linux-kernel\@vger.kernel.org" , Suresh Siddha , Sheng Yang , "kvm\@vger.kernel.org" To: Avi Kivity Return-path: Received: from out01.mta.xmission.com ([166.70.13.231]:49803 "EHLO out01.mta.xmission.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752939AbZF3TgC (ORCPT ); Tue, 30 Jun 2009 15:36:02 -0400 In-Reply-To: <4A4A6499.9000406@redhat.com> (Avi Kivity's message of "Tue\, 30 Jun 2009 22\:16\:41 +0300") Sender: kvm-owner@vger.kernel.org List-ID: Avi Kivity writes: > On 06/30/2009 10:08 PM, Eric W. Biederman wrote: >>> Can you elaborate? For kvm guests, the hardware is reasonably will implemented >>> and if not we will fix it. We need not cripple a feature just because some >>> hardware is broken. >>> >> >> The short version is I don't know what work arounds we will ultimately >> decide to deploy to work with real hardware. >> >> I have been seriously contemplating causing a cpu hot-unplug request >> to fail if we are in ioapic mode and we have irqs routed to the cpu >> that is being unplugged. >> > > Well, obviously we need to disassociate any irqs from such a cpu. Could be done > from the kernel or only enforced by the kernel. Using the normal irq migration path we can move irqs off of a cpu reliably there just aren't any progress guarantees. >> Even with perfectly working hardware it is not possible in the general >> case to migrate an ioapic irq from one cpu to another outside of an >> interrupt handler without without risking dropping an interrupt. >> > > Can't you generate a spurious interrupt immediately after the migration? An > extra interrupt shouldn't hurt. Nope. The ioapics can't be told to send an interrupt. >> There is no general way to know you have seen the last interrupt >> floating around your system. PCI ordering rules don't help because >> the ioapics can potentially take an out of band channel. >> > > Can you describe the problem scenario? an ioapic->lapic message delivered to a > dead cpu? Dropped irqs.. Driver hangs because it is waiting for an irq. Hardware hangs because it is waiting for the cpu to process the irq. Potentially we get a level triggered irq that is never acked by the cpu that won't arm until the cpu send an ack, and we can't send an ack from another cpu. Eric