Re: [Patch v2 3/4] x86/sev: Add guest support for Enhanced SMT Protection

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] x86/sev: tools/arch/x86/include/asm/msr-index.h out of sync
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commit 52d51b6c190bcd07e516526d1a62088b4f2a3da6
Author: Pratik R. Sampat <prsampat@amd.com>

x86/sev: Add guest support for Enhanced SMT Protection

This commit adds guest support for Enhanced SMT Protection (ESMTP). It
populates the VMSA with the vCPU's identity and sets the SMT sibling
mask before the page is turned into a VMSA so that threads of the same
guest trust each other.

[ ... ]

> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index ee9fb820a1cd7..638867e7b4ec2 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -745,7 +745,9 @@
>  #define MSR_AMD64_SNP_SMT_PROT		BIT_ULL(MSR_AMD64_SNP_SMT_PROT_BIT)
>  #define MSR_AMD64_SNP_SECURE_AVIC_BIT	18
>  #define MSR_AMD64_SNP_SECURE_AVIC	BIT_ULL(MSR_AMD64_SNP_SECURE_AVIC_BIT)
> -#define MSR_AMD64_SNP_RESERVED_BITS19_22 GENMASK_ULL(22, 19)
> +#define MSR_AMD64_SNP_ESMT_PROT_BIT	19
> +#define MSR_AMD64_SNP_ESMT_PROT	BIT_ULL(MSR_AMD64_SNP_ESMT_PROT_BIT)
> +#define MSR_AMD64_SNP_RESERVED_BITS20_22 GENMASK_ULL(22, 20)

[Severity: Low]
Does tools/arch/x86/include/asm/msr-index.h also need to be updated to
stay in sync with this change?

This out-of-sync tools header will cause build warnings indicating that
the kernel ABI header differs from the latest version, because it lacks
the new ESMT_PROT and RESERVED_BITS20_22 macros.

>  #define MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT	23
>  #define MSR_AMD64_SNP_IBPB_ON_ENTRY	BIT_ULL(MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT)
>  #define MSR_AMD64_SNP_RESV_BIT		24

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Sashiko AI review · https://sashiko.dev/#/patchset/cover.1791302373.git.prsampat@amd.com?part=3