From: Suzuki Kuruppassery Poulose <suzuki.poulose@arm.com>
To: Steven Price <steven.price@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>
Cc: kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 3/3] arm64: Workaround for Cortex-A55 erratum 1530923
Date: Thu, 14 Nov 2019 10:27:31 +0000 [thread overview]
Message-ID: <0b017ec9-5be1-90b9-be30-09462dec9e9d@arm.com> (raw)
In-Reply-To: <20191113172252.12610-4-steven.price@arm.com>
On 13/11/2019 17:22, Steven Price wrote:
> Cortex-A55 erratum 1530923 allows TLB entries to be allocated as a
> result of a speculative AT instruction. This may happen in the middle of
> a guest world switch while the relevant VMSA configuration is in an
> inconsistent state, leading to erroneous content being allocated into
> TLBs.
>
> The same workaround as is used for Cortex-A76 erratum 1165522
> (WORKAROUND_SPECULATIVE_AT_NVE) can be used here. Note that this
> mandates the use of VHE on affected parts.
>
> Signed-off-by: Steven Price <steven.price@arm.com>
> ---
> Documentation/arm64/silicon-errata.rst | 2 ++
> arch/arm64/Kconfig | 13 +++++++++++++
> arch/arm64/include/asm/kvm_hyp.h | 4 ++--
> arch/arm64/kernel/cpu_errata.c | 6 +++++-
> arch/arm64/kvm/hyp/switch.c | 4 ++--
> arch/arm64/kvm/hyp/tlb.c | 4 ++--
> 6 files changed, 26 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst
> index 899a72570282..b40cb3e0634e 100644
> --- a/Documentation/arm64/silicon-errata.rst
> +++ b/Documentation/arm64/silicon-errata.rst
> @@ -88,6 +88,8 @@ stable kernels.
> +----------------+-----------------+-----------------+-----------------------------+
> | ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 |
> +----------------+-----------------+-----------------+-----------------------------+
> +| ARM | Cortex-A55 | #1530923 | ARM64_ERRATUM_1530923 |
> ++----------------+-----------------+-----------------+-----------------------------+
> | ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
> +----------------+-----------------+-----------------+-----------------------------+
> | ARM | Neoverse-N1 | #1349291 | N/A |
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index defb68e45387..d2dd72c19560 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -532,6 +532,19 @@ config ARM64_ERRATUM_1165522
>
> If unsure, say Y.
>
> +config ARM64_ERRATUM_1530923
> + bool "Cortex-A55: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
> + default y
> + select ARM64_WORKAROUND_SPECULATIVE_AT
ARM64_WORKAROUND_SPECULATIVE_AT_VHE ?
Otherwise looks good to me.
Suzuki
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next prev parent reply other threads:[~2019-11-14 10:27 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-13 17:22 [PATCH v3 0/3] arm64: Workaround for Cortex-A55 erratum 1530923 Steven Price
2019-11-13 17:22 ` [PATCH v3 1/3] arm64: Rename WORKAROUND_1165522 to SPECULATIVE_AT_VHE Steven Price
2019-11-14 10:25 ` Suzuki Kuruppassery Poulose
2019-11-13 17:22 ` [PATCH v3 2/3] arm64: Rename WORKAROUND_1319367 to SPECULATIVE_AT_NVHE Steven Price
2019-11-14 10:26 ` Suzuki Kuruppassery Poulose
2019-11-13 17:22 ` [PATCH v3 3/3] arm64: Workaround for Cortex-A55 erratum 1530923 Steven Price
2019-11-14 10:27 ` Suzuki Kuruppassery Poulose [this message]
2019-11-14 11:06 ` Steven Price
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