From: Baptiste Reynal <b.reynal@virtualopensystems.com>
To: iommu@lists.linux-foundation.org, kvmarm@lists.cs.columbia.edu
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will.deacon@arm.com>,
open list <linux-kernel@vger.kernel.org>,
tech@virtualopensystems.com,
"moderated list:ARM SMMU DRIVER"
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH 1/1] iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition
Date: Mon, 2 Mar 2015 17:57:22 +0100 [thread overview]
Message-ID: <1425315442-29584-1-git-send-email-b.reynal@virtualopensystems.com> (raw)
This patch is a fix to "iommu/arm-smmu: add support for iova_to_phys
through ATS1PR".
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.
Signed-off-by: Baptiste Reynal <b.reynal@virtualopensystems.com>
---
drivers/iommu/arm-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index fc13dd5..d4beca4 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1556,7 +1556,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
return -ENODEV;
}
- if (smmu->version == 1 || (!(id & ID0_ATOSNS) && (id & ID0_S1TS))) {
+ if ((id & ID0_S1TS) && ((smmu->version == 1) || (id & ID0_ATOSNS))) {
smmu->features |= ARM_SMMU_FEAT_TRANS_OPS;
dev_notice(smmu->dev, "\taddress translation ops\n");
}
--
2.3.1
next reply other threads:[~2015-03-02 16:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-02 16:57 Baptiste Reynal [this message]
2015-03-02 17:24 ` [PATCH 1/1] iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition Will Deacon
[not found] ` <20150302172444.GB7919-5wv7dgnIgG8@public.gmane.org>
2015-03-03 8:57 ` Baptiste Reynal
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