From: Andre Przywara <andre.przywara@arm.com>
To: Christoffer Dall <christoffer.dall@linaro.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Eric Auger <eric.auger@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Subject: [PATCH v4 11/12] KVM: arm64: implement MSI injection in ITS emulation
Date: Sat, 26 Mar 2016 02:14:09 +0000 [thread overview]
Message-ID: <1458958450-19662-12-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1458958450-19662-1-git-send-email-andre.przywara@arm.com>
When userland wants to inject a MSI into the guest, we have to use
our data structures to find the LPI number and the VCPU to receive
the interrupt.
Use the wrapper functions to iterate the linked lists and find the
proper Interrupt Translation Table Entry. Then set the pending bit
in this ITTE to be later picked up by the LR handling code. Kick
the VCPU which is meant to handle this interrupt.
We provide a VGIC emulation model specific routine for the actual
MSI injection. The wrapper functions return an error for models not
(yet) implementing MSIs (like the GICv2 emulation).
We also provide the handler for the ITS "INT" command, which allows a
guest to trigger an MSI via the ITS command queue.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
virt/kvm/arm/vgic/its-emul.c | 61 ++++++++++++++++++++++++++++++++++++++++++++
virt/kvm/arm/vgic/vgic.h | 6 +++++
2 files changed, 67 insertions(+)
diff --git a/virt/kvm/arm/vgic/its-emul.c b/virt/kvm/arm/vgic/its-emul.c
index dcd0cac..166551d 100644
--- a/virt/kvm/arm/vgic/its-emul.c
+++ b/virt/kvm/arm/vgic/its-emul.c
@@ -371,6 +371,51 @@ static int vgic_mmio_read_its_idregs(struct kvm_vcpu *vcpu,
return 0;
}
+/*
+ * Translates an incoming MSI request into the redistributor (=VCPU) and
+ * the associated LPI number. Sets the LPI pending bit and also marks the
+ * VCPU as having a pending interrupt.
+ */
+int vits_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
+{
+ struct vgic_dist *dist = &kvm->arch.vgic;
+ struct vgic_its *its = &dist->its;
+ struct its_itte *itte;
+ bool inject = false;
+ int ret = 0;
+
+ if (!vgic_has_its(kvm))
+ return -ENODEV;
+
+ if (!(msi->flags & KVM_MSI_VALID_DEVID))
+ return -EINVAL;
+
+ spin_lock(&its->lock);
+
+ if (!its->enabled || !dist->lpis_enabled) {
+ ret = -EAGAIN;
+ goto out_unlock;
+ }
+
+ itte = find_itte(kvm, msi->devid, msi->data);
+ /* Triggering an unmapped IRQ gets silently dropped. */
+ if (!itte || !its_is_collection_mapped(itte->collection))
+ goto out_unlock;
+
+ inject = true;
+
+out_unlock:
+ spin_unlock(&its->lock);
+
+ if (inject) {
+ spin_lock(&itte->irq.irq_lock);
+ itte->irq.pending = true;
+ vgic_queue_irq(kvm, &itte->irq);
+ }
+
+ return ret;
+}
+
struct vgic_irq *vgic_its_get_lpi(struct kvm *kvm, u32 intid)
{
struct its_itte *itte;
@@ -795,6 +840,19 @@ static int vits_cmd_handle_movall(struct kvm *kvm, u64 *its_cmd)
return 0;
}
+/* The INT command injects the LPI associated with that DevID/EvID pair. */
+static int vits_cmd_handle_int(struct kvm *kvm, u64 *its_cmd)
+{
+ struct kvm_msi msi = {
+ .data = its_cmd_get_id(its_cmd),
+ .devid = its_cmd_get_deviceid(its_cmd),
+ .flags = KVM_MSI_VALID_DEVID,
+ };
+
+ vits_inject_msi(kvm, &msi);
+ return 0;
+}
+
/*
* This function is called with both the ITS and the distributor lock dropped,
* so the actual command handlers must take the respective locks when needed.
@@ -829,6 +887,9 @@ static int vits_handle_command(struct kvm_vcpu *vcpu, u64 *its_cmd)
case GITS_CMD_MOVALL:
ret = vits_cmd_handle_movall(vcpu->kvm, its_cmd);
break;
+ case GITS_CMD_INT:
+ ret = vits_cmd_handle_int(vcpu->kvm, its_cmd);
+ break;
case GITS_CMD_INV:
ret = vits_cmd_handle_inv(vcpu->kvm, its_cmd);
break;
diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
index a7218b0..223c778 100644
--- a/virt/kvm/arm/vgic/vgic.h
+++ b/virt/kvm/arm/vgic/vgic.h
@@ -65,6 +65,7 @@ int vgic_register_redist_regions(struct kvm *kvm, gpa_t dist_base_address);
int vits_init(struct kvm *kvm);
void vgic_enable_lpis(struct kvm_vcpu *vcpu);
struct vgic_irq *vgic_its_get_lpi(struct kvm *kvm, u32 intid);
+int vits_inject_msi(struct kvm *kvm, struct kvm_msi *msi);
void vits_destroy(struct kvm *kvm);
#else
static inline void vgic_v3_irq_change_affinity(struct kvm *kvm, u32 intid,
@@ -146,6 +147,11 @@ static inline struct vgic_irq *vgic_its_get_lpi(struct kvm *kvm, u32 intid)
return NULL;
}
+static inline int vits_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
+{
+ return -ENODEV;
+}
+
static inline void vits_destroy(struct kvm *kvm)
{
return;
--
2.7.3
next prev parent reply other threads:[~2016-03-26 2:14 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-26 2:13 [PATCH v4 00/12] KVM: arm64: GICv3 ITS emulation Andre Przywara
2016-03-26 2:13 ` [PATCH v4 01/12] KVM: extend struct kvm_msi to hold a 32-bit device ID Andre Przywara
2016-04-03 9:15 ` Christoffer Dall
2016-05-25 15:55 ` Andre Przywara
2016-05-25 16:16 ` Marc Zyngier
2016-05-31 13:05 ` Christoffer Dall
2016-05-05 17:55 ` Chalamarla, Tirumalesh
2016-03-26 2:14 ` [PATCH v4 02/12] KVM: arm/arm64: extend arch CAP checks to allow per-VM capabilities Andre Przywara
2016-04-03 10:08 ` Christoffer Dall
2016-04-05 12:48 ` Eric Auger
2016-05-05 18:00 ` Chalamarla, Tirumalesh
2016-03-26 2:14 ` [PATCH v4 03/12] KVM: arm64: Introduce new MMIO region for the ITS base address Andre Przywara
2016-04-03 10:08 ` Christoffer Dall
2016-04-05 12:47 ` Eric Auger
2016-04-07 13:44 ` Marc Zyngier
2016-05-05 18:08 ` Chalamarla, Tirumalesh
2016-05-09 15:47 ` Marc Zyngier
2016-05-09 16:53 ` Chalamarla, Tirumalesh
2016-05-09 17:09 ` Marc Zyngier
2016-03-26 2:14 ` [PATCH v4 04/12] KVM: arm64: handle ITS related GICv3 redistributor registers Andre Przywara
2016-04-03 10:08 ` Christoffer Dall
2016-04-05 12:55 ` Eric Auger
2016-04-05 15:17 ` Eric Auger
2016-04-07 13:54 ` Marc Zyngier
2016-04-07 13:58 ` Marc Zyngier
2016-05-05 18:06 ` Chalamarla, Tirumalesh
2016-03-26 2:14 ` [PATCH v4 05/12] KVM: arm64: introduce ITS emulation file with stub functions Andre Przywara
2016-04-05 16:03 ` Eric Auger
2016-04-07 14:04 ` Marc Zyngier
2016-04-07 14:08 ` Eric Auger
2016-04-07 14:48 ` Marc Zyngier
2016-04-07 15:09 ` Eric Auger
2016-04-07 15:19 ` Marc Zyngier
2016-03-26 2:14 ` [PATCH v4 06/12] KVM: arm64: implement basic ITS register handlers Andre Przywara
2016-04-03 10:08 ` Christoffer Dall
2016-04-06 9:36 ` Eric Auger
2016-05-25 13:49 ` Andre Przywara
2016-04-07 14:35 ` Marc Zyngier
2016-05-25 11:37 ` Andre Przywara
2016-05-26 9:10 ` Marc Zyngier
2016-06-03 15:42 ` Andre Przywara
2016-06-03 16:54 ` Marc Zyngier
2016-05-05 18:51 ` Chalamarla, Tirumalesh
2016-03-26 2:14 ` [PATCH v4 07/12] KVM: arm64: add data structures to model ITS interrupt translation Andre Przywara
2016-04-06 9:53 ` Eric Auger
2016-03-26 2:14 ` [PATCH v4 08/12] KVM: arm64: connect LPIs to the VGIC emulation Andre Przywara
2016-04-06 12:00 ` Eric Auger
2016-05-05 18:59 ` Chalamarla, Tirumalesh
2016-03-26 2:14 ` [PATCH v4 09/12] KVM: arm64: sync LPI configuration and pending tables Andre Przywara
2016-04-06 13:41 ` Eric Auger
2016-06-03 14:17 ` Andre Przywara
2016-03-26 2:14 ` [PATCH v4 10/12] KVM: arm64: implement ITS command queue command handlers Andre Przywara
2016-05-05 19:12 ` Chalamarla, Tirumalesh
2016-05-25 14:34 ` Andre Przywara
2016-03-26 2:14 ` Andre Przywara [this message]
2016-03-26 2:14 ` [PATCH v4 12/12] KVM: arm64: enable ITS emulation as a virtual MSI controller Andre Przywara
2016-06-03 4:26 ` [PATCH v4 00/12] KVM: arm64: GICv3 ITS emulation Bharat Bhushan
2016-06-03 14:32 ` Andre Przywara
2016-06-06 5:29 ` Bharat Bhushan
2016-06-07 8:02 ` Christoffer Dall
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