From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Fangrui Song <maskray@google.com>, Marc Zyngier <maz@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
open list <linux-kernel@vger.kernel.org>,
stable@vger.kernel.org,
"open list:KERNEL VIRTUAL MACHINE FOR ARM64 \(KVM/arm64\)"
<kvmarm@lists.cs.columbia.edu>, Mark Brown <broonie@kernel.org>,
Kristina Martsenko <kristina.martsenko@arm.com>,
Sami Tolvanen <samitolvanen@google.com>,
Greg KH <gregkh@linuxfoundation.org>,
Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH stable 4.14 v2 0/2] arm64: entry: Place an SB sequence following an ERET instruction
Date: Mon, 24 Aug 2020 11:36:08 -0700 [thread overview]
Message-ID: <1598294170-24345-1-git-send-email-f.fainelli@gmail.com> (raw)
Changes in v2:
- included missing preliminary patch to define the SB barrier instruction
Will Deacon (2):
arm64: Add support for SB barrier and patch in over DSB; ISB sequences
arm64: entry: Place an SB sequence following an ERET instruction
arch/arm64/include/asm/assembler.h | 13 +++++++++++++
arch/arm64/include/asm/barrier.h | 4 ++++
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/include/asm/sysreg.h | 6 ++++++
arch/arm64/include/asm/uaccess.h | 3 +--
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 12 ++++++++++++
arch/arm64/kernel/cpuinfo.c | 1 +
arch/arm64/kernel/entry.S | 2 ++
arch/arm64/kvm/hyp/entry.S | 2 ++
arch/arm64/kvm/hyp/hyp-entry.S | 4 ++++
11 files changed, 48 insertions(+), 3 deletions(-)
--
2.7.4
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next reply other threads:[~2020-08-24 18:36 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-24 18:36 Florian Fainelli [this message]
2020-08-24 18:36 ` [PATCH stable 4.14 v2 1/2] arm64: Add support for SB barrier and patch in over DSB; ISB sequences Florian Fainelli
2020-08-24 18:36 ` [PATCH stable 4.14 v2 2/2] arm64: entry: Place an SB sequence following an ERET instruction Florian Fainelli
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