From: Will Deacon <will.deacon@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Shannon Zhao <zhaoshenglong@huawei.com>,
kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
alex.bennee@linaro.org, wei@redhat.com, cov@codeaurora.org,
shannon.zhao@linaro.org, peter.huangpeng@huawei.com,
hangaohuai@huawei.com
Subject: Re: [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu
Date: Tue, 8 Dec 2015 13:53:36 +0000 [thread overview]
Message-ID: <20151208135335.GK19612@arm.com> (raw)
In-Reply-To: <5666DD0A.5060004@arm.com>
On Tue, Dec 08, 2015 at 01:37:14PM +0000, Marc Zyngier wrote:
> On 08/12/15 12:47, Shannon Zhao wrote:
> > From: Shannon Zhao <shannon.zhao@linaro.org>
> >
> > Here we plan to support virtual PMU for guest by full software
> > emulation, so define some basic structs and functions preparing for
> > futher steps. Define struct kvm_pmc for performance monitor counter and
> > struct kvm_pmu for performance monitor unit for each vcpu. According to
> > ARMv8 spec, the PMU contains at most 32(ARMV8_MAX_COUNTERS) counters.
> >
> > Since this only supports ARM64 (or PMUv3), add a separate config symbol
> > for it.
> >
> > Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
> > ---
> > arch/arm64/include/asm/kvm_host.h | 2 ++
> > arch/arm64/kvm/Kconfig | 8 ++++++++
> > include/kvm/arm_pmu.h | 40 +++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 50 insertions(+)
> > create mode 100644 include/kvm/arm_pmu.h
[...]
> > diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
> > index a5272c0..66da9a2 100644
> > --- a/arch/arm64/kvm/Kconfig
> > +++ b/arch/arm64/kvm/Kconfig
> > @@ -36,6 +36,7 @@ config KVM
> > select HAVE_KVM_EVENTFD
> > select HAVE_KVM_IRQFD
> > select KVM_ARM_VGIC_V3
> > + select KVM_ARM_PMU
>
> What if HW_PERF_EVENTS is not selected? Also, selecting HW_PERF_EVENTS
> is not enough, and you probably need PERF_EVENTS as well, So this should
> probably read:
>
> select KVM_ARM_PMU if (HW_PERF_EVENTS && PERF_EVENTS)
HW_PERF_EVENTS depends on ARM_PMU which in turn depends on PERF_EVENTS.
Will
next prev parent reply other threads:[~2015-12-08 13:53 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-08 12:47 [PATCH v6 00/21] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 01/21] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 02/21] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2015-12-08 13:37 ` Marc Zyngier
2015-12-08 13:53 ` Will Deacon [this message]
2015-12-08 14:10 ` Marc Zyngier
2015-12-08 14:14 ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 03/21] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 04/21] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register Shannon Zhao
2015-12-08 14:23 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2015-12-08 15:43 ` Marc Zyngier
2015-12-09 7:38 ` Shannon Zhao
2015-12-09 8:23 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 08/21] KVM: ARM64: Add access handler for PMEVTYPERn and PMCCFILTR register Shannon Zhao
2015-12-08 16:17 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 09/21] KVM: ARM64: Add access handler for PMXEVTYPER register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 10/21] KVM: ARM64: Add access handler for PMEVCNTRn and PMCCNTR register Shannon Zhao
2015-12-08 16:30 ` Marc Zyngier
2015-12-10 11:36 ` Shannon Zhao
2015-12-10 12:07 ` Marc Zyngier
2015-12-10 13:23 ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 11/21] KVM: ARM64: Add access handler for PMXEVCNTR register Shannon Zhao
2015-12-08 16:33 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 12/21] KVM: ARM64: Add reset and access handlers for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2015-12-08 16:42 ` Marc Zyngier
2015-12-09 8:35 ` Shannon Zhao
2015-12-09 8:56 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 13/21] KVM: ARM64: Add reset and access handlers for PMINTENSET and PMINTENCLR register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 14/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register Shannon Zhao
2015-12-08 16:59 ` Marc Zyngier
2015-12-09 8:47 ` Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 15/21] KVM: ARM64: Add reset and access handlers for PMUSERENR register Shannon Zhao
2015-12-08 17:03 ` Marc Zyngier
2015-12-09 9:18 ` Shannon Zhao
2015-12-09 9:49 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 16/21] KVM: ARM64: Add reset and access handlers for PMSWINC register Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 17/21] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2015-12-08 17:36 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 18/21] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2015-12-08 17:37 ` Marc Zyngier
2015-12-08 12:47 ` [PATCH v6 19/21] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 20/21] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2015-12-08 12:47 ` [PATCH v6 21/21] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2015-12-08 17:43 ` Marc Zyngier
2015-12-08 17:56 ` [PATCH v6 00/21] KVM: ARM64: Add guest PMU support Marc Zyngier
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