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From: Marc Zyngier <marc.zyngier@arm.com>
To: Shannon Zhao <zhaoshenglong@huawei.com>
Cc: kvm@vger.kernel.org, shannon.zhao@linaro.org,
	will.deacon@arm.com, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register
Date: Thu, 7 Jan 2016 13:15:20 +0000	[thread overview]
Message-ID: <20160107131520.173fa49a@arm.com> (raw)
In-Reply-To: <568E5BDD.6010908@huawei.com>

On Thu, 7 Jan 2016 20:36:45 +0800
Shannon Zhao <zhaoshenglong@huawei.com> wrote:

> 
> 
> On 2016/1/7 19:03, Marc Zyngier wrote:
> > On 22/12/15 08:08, Shannon Zhao wrote:
> >> > From: Shannon Zhao <shannon.zhao@linaro.org>
> >> > 
> >> > These kind of registers include PMEVTYPERn, PMCCFILTR and PMXEVTYPER
> >> > which is mapped to PMEVTYPERn or PMCCFILTR.
> >> > 
> >> > The access handler translates all aarch32 register offsets to aarch64
> >> > ones and uses vcpu_sys_reg() to access their values to avoid taking care
> >> > of big endian.
> >> > 
> >> > When writing to these registers, create a perf_event for the selected
> >> > event type.
> >> > 
> >> > Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
> >> > ---
> >> >  arch/arm64/kvm/sys_regs.c | 156 +++++++++++++++++++++++++++++++++++++++++++++-
> >> >  1 file changed, 154 insertions(+), 2 deletions(-)
> >> > 
> >> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> >> > index 2552db1..ed2939b 100644
> >> > --- a/arch/arm64/kvm/sys_regs.c
> >> > +++ b/arch/arm64/kvm/sys_regs.c
> >> > @@ -505,6 +505,70 @@ static bool access_pmceid(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
> >> >  	return true;
> >> >  }
> >> >  
> >> > +static inline bool pmu_counter_idx_valid(struct kvm_vcpu *vcpu, u64 idx)
> >> > +{
> >> > +	u64 pmcr, val;
> >> > +
> >> > +	pmcr = vcpu_sys_reg(vcpu, PMCR_EL0);
> >> > +	val = (pmcr >> ARMV8_PMCR_N_SHIFT) & ARMV8_PMCR_N_MASK;
> >> > +	if (idx >= val && idx != ARMV8_CYCLE_IDX)
> >> > +		return false;
> >> > +
> >> > +	return true;
> >> > +}
> >> > +
> >> > +static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
> >> > +			       const struct sys_reg_desc *r)
> >> > +{
> >> > +	u64 idx, reg;
> >> > +
> >> > +	if (r->CRn == 9) {
> >> > +		/* PMXEVTYPER_EL0 */
> >> > +		reg = 0;
> > Is there any particular reason why you're not setting reg to PMSELR_EL0,
> > since this is what you're using?
> > 
> >> > +	} else {
> >> > +		if (!p->is_aarch32) {
> >> > +			/* PMEVTYPERn_EL0 or PMCCFILTR_EL0 */
> >> > +			reg = r->reg;
> >> > +		} else {
> >> > +			if (r->CRn == 14 && r->CRm == 15 && r->Op2 == 7) {
> >> > +				reg = PMCCFILTR_EL0;
> >> > +			} else {
> >> > +				reg = ((r->CRm & 3) << 3) | (r->Op2 & 7);
> >> > +				reg += PMEVTYPER0_EL0;
> >> > +			}
> >> > +		}
> >> > +	}
> >> > +
> >> > +	switch (reg) {
> >> > +	case PMEVTYPER0_EL0 ... PMEVTYPER30_EL0:
> >> > +		idx = reg - PMEVTYPER0_EL0;
> >> > +		if (!pmu_counter_idx_valid(vcpu, idx))
> >> > +			return true;
> >> > +		break;
> >> > +	case PMCCFILTR_EL0:
> >> > +		idx = ARMV8_CYCLE_IDX;
> >> > +		break;
> >> > +	default:
> > This would allow this case to be more precise, and we could have the
> > default case as a bug handler.
> > 
> 
> It turns out that I refactor this function like below:
> 
> +static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct
> sys_reg_params *p,
> +                              const struct sys_reg_desc *r)
> +{
> +       u64 idx, reg = 0;
> +
> +       if (r->CRn == 9) {
> +               /* PMXEVTYPER_EL0 */
> +               idx = vcpu_sys_reg(vcpu, PMSELR_EL0) & ARMV8_COUNTER_MASK;
> +               reg = PMEVTYPER0_EL0 + idx;
> +       } else {
> +               if (r->CRm == 15 && r->Op2 == 7) {
> +                       idx = ARMV8_CYCLE_IDX;
> +                       reg = PMCCFILTR_EL0;
> +               } else {
> +                       /* PMEVTYPERn_EL0 */
> +                       idx = ((r->CRm & 3) << 3) | (r->Op2 & 7);
> +                       reg = PMEVTYPER0_EL0 + idx;
> +               }
> +       }
> +
> +       BUG_ON(reg == 0);
> +
> +       if (!pmu_counter_idx_valid(vcpu, idx))
> +               return false;
> +
> +       if (p->is_write) {
> +               kvm_pmu_set_counter_event_type(vcpu, p->regval, idx);
> +               vcpu_sys_reg(vcpu, reg) = p->regval & ARMV8_EVTYPE_MASK;
> +       } else {
> +               p->regval = vcpu_sys_reg(vcpu, reg) & ARMV8_EVTYPE_MASK;
> +       }
> +
> +       return true;
> +}
> 
> How about this?

Yup, looks good to me.

	M.
-- 
Jazz is not dead. It just smells funny.

  reply	other threads:[~2016-01-07 13:11 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-22  8:07 [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-22  8:07 ` [PATCH v8 01/20] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2016-01-07 10:20   ` Marc Zyngier
2015-12-22  8:07 ` [PATCH v8 02/20] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2016-01-07 10:21   ` Marc Zyngier
2016-01-07 19:07   ` Andrew Jones
2015-12-22  8:07 ` [PATCH v8 03/20] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2016-01-07 10:23   ` Marc Zyngier
2015-12-22  8:07 ` [PATCH v8 04/20] KVM: ARM64: Add access handler for PMCR register Shannon Zhao
2016-01-07 10:43   ` Marc Zyngier
2016-01-07 11:16     ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 05/20] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao
2016-01-07 10:43   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 06/20] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao
2016-01-07 10:44   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 07/20] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2016-01-07 10:55   ` Marc Zyngier
2016-01-07 13:48   ` Marc Zyngier
2016-01-07 14:00     ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register Shannon Zhao
2016-01-07 11:03   ` Marc Zyngier
2016-01-07 11:11     ` Shannon Zhao
2016-01-07 12:36     ` Shannon Zhao
2016-01-07 13:15       ` Marc Zyngier [this message]
2016-01-07 12:09   ` Shannon Zhao
2016-01-07 13:01     ` Marc Zyngier
2016-01-07 19:17   ` Andrew Jones
2015-12-22  8:08 ` [PATCH v8 09/20] KVM: ARM64: Add access handler for event counter register Shannon Zhao
2016-01-07 11:06   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 10/20] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2016-01-07 11:09   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 11/20] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao
2016-01-07 11:13   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 12/20] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao
2016-01-07 11:14   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 13/20] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao
2016-01-07 11:29   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 14/20] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2016-01-07 11:59   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 15/20] KVM: ARM64: Add a helper to forward trap to guest EL1 Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 16/20] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao
2016-01-07 10:14   ` Marc Zyngier
2016-01-07 11:15     ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 17/20] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2016-01-07 13:28   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 18/20] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2016-01-07 13:39   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 19/20] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2016-01-07 13:51   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2016-01-07 13:56   ` Marc Zyngier
2016-01-07 14:35     ` Shannon Zhao
2016-01-07 14:36   ` Peter Maydell
2016-01-07 14:49     ` Shannon Zhao
2016-01-07 14:56       ` Peter Maydell
2016-01-07 20:36         ` Andrew Jones
2016-01-09 12:29           ` Christoffer Dall
2016-01-09 15:03             ` Marc Zyngier
2016-01-11  8:45               ` Shannon Zhao
2016-01-11  8:59                 ` Marc Zyngier
2016-01-11 11:52                   ` Andrew Jones
2016-01-11 12:03                     ` Shannon Zhao
2016-01-11 14:07               ` Andrew Jones
2016-01-11 15:09                 ` Christoffer Dall
2016-01-11 16:09                   ` Andrew Jones
2016-01-11 16:13                     ` Peter Maydell
2016-01-11 16:48                       ` Andrew Jones
2016-01-11 16:21                     ` Andrew Jones
2016-01-11 16:29                       ` Peter Maydell
2016-01-11 16:44                         ` Andrew Jones
2016-01-08  3:06         ` Shannon Zhao
2016-01-08 10:24           ` Peter Maydell
2016-01-08 12:15             ` Shannon Zhao
2016-01-08 12:56               ` Peter Maydell
2016-01-08 13:31                 ` Shannon Zhao
2016-01-07 20:18   ` Andrew Jones
2016-01-08  2:53     ` Shannon Zhao
2016-01-08 11:22       ` Andrew Jones
2016-01-08 15:20         ` Andrew Jones
2016-01-08 15:59           ` Andrew Jones
2016-01-07 14:10 ` [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Marc Zyngier
2016-01-07 14:12   ` Will Deacon
2016-01-07 14:21     ` Marc Zyngier

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