From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoffer Dall Subject: Re: [PATCH v6 12/13] KVM: arm64: Handle RAS SErrors from EL2 on guest exit Date: Fri, 19 Jan 2018 20:54:42 +0100 Message-ID: <20180119195442.GI21802@cbox> References: <20180115193906.30053-1-james.morse@arm.com> <20180115193906.30053-13-james.morse@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 83DAD49DC0 for ; Fri, 19 Jan 2018 14:49:36 -0500 (EST) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WJ351oaGIm2J for ; Fri, 19 Jan 2018 14:49:35 -0500 (EST) Received: from mail-wm0-f54.google.com (mail-wm0-f54.google.com [74.125.82.54]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 490D749DAC for ; Fri, 19 Jan 2018 14:49:35 -0500 (EST) Received: by mail-wm0-f54.google.com with SMTP id t74so5568187wme.3 for ; Fri, 19 Jan 2018 11:54:45 -0800 (PST) Content-Disposition: inline In-Reply-To: <20180115193906.30053-13-james.morse@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: James Morse Cc: Jonathan.Zhang@cavium.com, Marc Zyngier , Catalin Marinas , Will Deacon , Dongjiu Geng , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: kvmarm@lists.cs.columbia.edu On Mon, Jan 15, 2018 at 07:39:05PM +0000, James Morse wrote: > We expect to have firmware-first handling of RAS SErrors, with errors > notified via an APEI method. For systems without firmware-first, add > some minimal handling to KVM. > > There are two ways KVM can take an SError due to a guest, either may be a > RAS error: we exit the guest due to an SError routed to EL2 by HCR_EL2.AMO, > or we take an SError from EL2 when we unmask PSTATE.A from __guest_exit. > > The current SError from EL2 code unmasks SError and tries to fence any > pending SError into a single instruction window. It then leaves SError > unmasked. > > With the v8.2 RAS Extensions we may take an SError for a 'corrected' > error, but KVM is only able to handle SError from EL2 if they occur > during this single instruction window... > > The RAS Extensions give us a new instruction to synchronise and > consume SErrors. The RAS Extensions document (ARM DDI0587), > '2.4.1 ESB and Unrecoverable errors' describes ESB as synchronising > SError interrupts generated by 'instructions, translation table walks, > hardware updates to the translation tables, and instruction fetches on > the same PE'. This makes ESB equivalent to KVMs existing > 'dsb, mrs-daifclr, isb' sequence. > > Use the alternatives to synchronise and consume any SError using ESB > instead of unmasking and taking the SError. Set ARM_EXIT_WITH_SERROR_BIT > in the exit_code so that we can restart the vcpu if it turns out this > SError has no impact on the vcpu. > > Signed-off-by: James Morse > --- > Changes since v4: > * Moved the SError handling into handle_exit_early() > * Dropped Marc & Christoffer's Reviewed-by due to handle_exit_early(). > I realize this is queued, but for good measure, I'm still happy with this change after handle_exit_early(). Thanks, -Christoffer