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Wed, 15 Apr 2020 14:22:39 +0100 Date: Wed, 15 Apr 2020 14:22:37 +0100 From: Marc Zyngier To: Suzuki K Poulose Subject: Re: [PATCH 3/8] arm64: cpufeature: Add CPU capability for AArch32 EL1 support Message-ID: <20200415142237.651114f7@why> In-Reply-To: <7978a5a9-463e-5e96-7ea9-d8472b7b051c@arm.com> References: <20200414213114.2378-1-will@kernel.org> <20200414213114.2378-4-will@kernel.org> <20200415101444.GC12621@willie-the-truck> <7978a5a9-463e-5e96-7ea9-d8472b7b051c@arm.com> Organization: Approximate X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: suzuki.poulose@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, mark.rutland@arm.com, anshuman.khandual@arm.com, catalin.marinas@arm.com, saiprakash.ranjan@codeaurora.org, dianders@chromium.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: saiprakash.ranjan@codeaurora.org, kernel-team@android.com, anshuman.khandual@arm.com, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, dianders@chromium.org, will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Wed, 15 Apr 2020 14:15:51 +0100 Suzuki K Poulose wrote: > On 04/15/2020 11:14 AM, Will Deacon wrote: > > On Wed, Apr 15, 2020 at 11:13:54AM +0100, Suzuki K Poulose wrote: > >> On 04/14/2020 10:31 PM, Will Deacon wrote: > >>> Although we emit a "SANITY CHECK" warning and taint the kernel if we > >>> detect a CPU mismatch for AArch32 support at EL1, we still online the > >>> CPU with disastrous consequences for any running 32-bit VMs. > >>> > >>> Introduce a capability for AArch32 support at EL1 so that late onlining > >>> of incompatible CPUs is forbidden. > >>> > >>> Signed-off-by: Will Deacon > >> > >> One of the other important missing sanity check for KVM is the VMID width > >> check. I will code something up. > > > > Cheers! Do we handle things like the IPA size already? > > Good point. No, we don't. I will include this too. There is also the question of the ARMv8.5-GTG extension. I have a patch that treats it as non-strict, but that approach would fail with KVM if we online a late CPU without support for the right page size at S2. M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm