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From: Marc Zyngier <maz@kernel.org>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peng Hao <richard.peng@oppo.com>,
	kernel-team@android.com, kvm@vger.kernel.org,
	Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Alexander Graf <graf@amazon.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 44/56] KVM: arm64: Disintegrate SPSR array
Date: Wed,  5 Aug 2020 18:56:48 +0100	[thread overview]
Message-ID: <20200805175700.62775-45-maz@kernel.org> (raw)
In-Reply-To: <20200805175700.62775-1-maz@kernel.org>

As we're about to move SPSR_EL1 into the VNCR page, we need to
disassociate it from the rest of the 32bit cruft. Let's break
the array into individual fields.

Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/include/asm/kvm_emulate.h       |  4 +--
 arch/arm64/include/asm/kvm_host.h          |  6 +++-
 arch/arm64/kvm/guest.c                     | 19 ++++++++----
 arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 28 +++++++----------
 arch/arm64/kvm/regmap.c                    | 35 ++++++++++++++++++++--
 5 files changed, 63 insertions(+), 29 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index a12b5dc5db0d..5f959fedff09 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -176,7 +176,7 @@ static inline unsigned long vcpu_read_spsr(const struct kvm_vcpu *vcpu)
 	if (vcpu->arch.sysregs_loaded_on_cpu)
 		return read_sysreg_el1(SYS_SPSR);
 	else
-		return vcpu->arch.ctxt.spsr[KVM_SPSR_EL1];
+		return vcpu->arch.ctxt.spsr_el1;
 }
 
 static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v)
@@ -189,7 +189,7 @@ static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v)
 	if (vcpu->arch.sysregs_loaded_on_cpu)
 		write_sysreg_el1(v, SYS_SPSR);
 	else
-		vcpu->arch.ctxt.spsr[KVM_SPSR_EL1] = v;
+		vcpu->arch.ctxt.spsr_el1 = v;
 }
 
 /*
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 2bd6285eaf4c..dfb97ed2f680 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -241,7 +241,11 @@ enum vcpu_sysreg {
 struct kvm_cpu_context {
 	struct user_pt_regs regs;	/* sp = sp_el0 */
 
-	u64	spsr[KVM_NR_SPSR];
+	u64	spsr_el1;		/* aka spsr_svc */
+	u64	spsr_abt;
+	u64	spsr_und;
+	u64	spsr_irq;
+	u64	spsr_fiq;
 
 	struct user_fpsimd_state fp_regs;
 
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index d614716e073b..70215f3a6f89 100644
--- a/arch/arm64/kvm/guest.c
+++ b/arch/arm64/kvm/guest.c
@@ -134,11 +134,20 @@ static void *core_reg_addr(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
 	case KVM_REG_ARM_CORE_REG(elr_el1):
 		return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1);
 
-	case KVM_REG_ARM_CORE_REG(spsr[0]) ...
-	     KVM_REG_ARM_CORE_REG(spsr[KVM_NR_SPSR - 1]):
-		off -= KVM_REG_ARM_CORE_REG(spsr[0]);
-		off /= 2;
-		return &vcpu->arch.ctxt.spsr[off];
+	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_EL1]):
+		return &vcpu->arch.ctxt.spsr_el1;
+
+	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_ABT]):
+		return &vcpu->arch.ctxt.spsr_abt;
+
+	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_UND]):
+		return &vcpu->arch.ctxt.spsr_und;
+
+	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_IRQ]):
+		return &vcpu->arch.ctxt.spsr_irq;
+
+	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_FIQ]):
+		return &vcpu->arch.ctxt.spsr_fiq;
 
 	case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ...
 	     KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]):
diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
index 4c26ba72120e..fb4bc42e72c5 100644
--- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
+++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
@@ -48,7 +48,7 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
 
 	ctxt_sys_reg(ctxt, SP_EL1)	= read_sysreg(sp_el1);
 	ctxt_sys_reg(ctxt, ELR_EL1)	= read_sysreg_el1(SYS_ELR);
-	ctxt->spsr[KVM_SPSR_EL1]	= read_sysreg_el1(SYS_SPSR);
+	ctxt->spsr_el1			= read_sysreg_el1(SYS_SPSR);
 }
 
 static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)
@@ -127,7 +127,7 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt)
 
 	write_sysreg(ctxt_sys_reg(ctxt, SP_EL1),	sp_el1);
 	write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1),	SYS_ELR);
-	write_sysreg_el1(ctxt->spsr[KVM_SPSR_EL1],	SYS_SPSR);
+	write_sysreg_el1(ctxt->spsr_el1,		SYS_SPSR);
 }
 
 static inline void __sysreg_restore_el2_return_state(struct kvm_cpu_context *ctxt)
@@ -158,17 +158,13 @@ static inline void __sysreg_restore_el2_return_state(struct kvm_cpu_context *ctx
 
 static inline void __sysreg32_save_state(struct kvm_vcpu *vcpu)
 {
-	u64 *spsr;
-
 	if (!vcpu_el1_is_32bit(vcpu))
 		return;
 
-	spsr = vcpu->arch.ctxt.spsr;
-
-	spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt);
-	spsr[KVM_SPSR_UND] = read_sysreg(spsr_und);
-	spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq);
-	spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq);
+	vcpu->arch.ctxt.spsr_abt = read_sysreg(spsr_abt);
+	vcpu->arch.ctxt.spsr_und = read_sysreg(spsr_und);
+	vcpu->arch.ctxt.spsr_irq = read_sysreg(spsr_irq);
+	vcpu->arch.ctxt.spsr_fiq = read_sysreg(spsr_fiq);
 
 	__vcpu_sys_reg(vcpu, DACR32_EL2) = read_sysreg(dacr32_el2);
 	__vcpu_sys_reg(vcpu, IFSR32_EL2) = read_sysreg(ifsr32_el2);
@@ -179,17 +175,13 @@ static inline void __sysreg32_save_state(struct kvm_vcpu *vcpu)
 
 static inline void __sysreg32_restore_state(struct kvm_vcpu *vcpu)
 {
-	u64 *spsr;
-
 	if (!vcpu_el1_is_32bit(vcpu))
 		return;
 
-	spsr = vcpu->arch.ctxt.spsr;
-
-	write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt);
-	write_sysreg(spsr[KVM_SPSR_UND], spsr_und);
-	write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq);
-	write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq);
+	write_sysreg(vcpu->arch.ctxt.spsr_abt, spsr_abt);
+	write_sysreg(vcpu->arch.ctxt.spsr_und, spsr_und);
+	write_sysreg(vcpu->arch.ctxt.spsr_irq, spsr_irq);
+	write_sysreg(vcpu->arch.ctxt.spsr_fiq, spsr_fiq);
 
 	write_sysreg(__vcpu_sys_reg(vcpu, DACR32_EL2), dacr32_el2);
 	write_sysreg(__vcpu_sys_reg(vcpu, IFSR32_EL2), ifsr32_el2);
diff --git a/arch/arm64/kvm/regmap.c b/arch/arm64/kvm/regmap.c
index b1596f314087..97c110810527 100644
--- a/arch/arm64/kvm/regmap.c
+++ b/arch/arm64/kvm/regmap.c
@@ -147,8 +147,20 @@ unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu)
 {
 	int spsr_idx = vcpu_spsr32_mode(vcpu);
 
-	if (!vcpu->arch.sysregs_loaded_on_cpu)
-		return vcpu->arch.ctxt.spsr[spsr_idx];
+	if (!vcpu->arch.sysregs_loaded_on_cpu) {
+		switch (spsr_idx) {
+		case KVM_SPSR_SVC:
+			return vcpu->arch.ctxt.spsr_el1;
+		case KVM_SPSR_ABT:
+			return vcpu->arch.ctxt.spsr_abt;
+		case KVM_SPSR_UND:
+			return vcpu->arch.ctxt.spsr_und;
+		case KVM_SPSR_IRQ:
+			return vcpu->arch.ctxt.spsr_irq;
+		case KVM_SPSR_FIQ:
+			return vcpu->arch.ctxt.spsr_fiq;
+		}
+	}
 
 	switch (spsr_idx) {
 	case KVM_SPSR_SVC:
@@ -171,7 +183,24 @@ void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v)
 	int spsr_idx = vcpu_spsr32_mode(vcpu);
 
 	if (!vcpu->arch.sysregs_loaded_on_cpu) {
-		vcpu->arch.ctxt.spsr[spsr_idx] = v;
+		switch (spsr_idx) {
+		case KVM_SPSR_SVC:
+			vcpu->arch.ctxt.spsr_el1 = v;
+			break;
+		case KVM_SPSR_ABT:
+			vcpu->arch.ctxt.spsr_abt = v;
+			break;
+		case KVM_SPSR_UND:
+			vcpu->arch.ctxt.spsr_und = v;
+			break;
+		case KVM_SPSR_IRQ:
+			vcpu->arch.ctxt.spsr_irq = v;
+			break;
+		case KVM_SPSR_FIQ:
+			vcpu->arch.ctxt.spsr_fiq = v;
+			break;
+		}
+
 		return;
 	}
 
-- 
2.27.0

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  parent reply	other threads:[~2020-08-05 18:26 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-05 17:56 [GIT PULL] KVM/arm64 updates for 5.9 Marc Zyngier
2020-08-05 17:56 ` [PATCH 01/56] KVM: arm64: Enable Address Authentication at EL2 if available Marc Zyngier
2020-08-05 17:56 ` [PATCH 02/56] KVM: arm64: Allow ARM64_PTR_AUTH when ARM64_VHE=n Marc Zyngier
2020-08-05 17:56 ` [PATCH 03/56] KVM: arm64: Allow PtrAuth to be enabled from userspace on non-VHE systems Marc Zyngier
2020-08-05 17:56 ` [PATCH 04/56] KVM: arm64: Check HCR_EL2 instead of shadow copy to swap PtrAuth registers Marc Zyngier
2020-08-05 17:56 ` [PATCH 05/56] KVM: arm64: Simplify PtrAuth alternative patching Marc Zyngier
2020-08-05 17:56 ` [PATCH 06/56] KVM: arm64: Allow in-atomic injection of SPIs Marc Zyngier
2020-08-05 17:56 ` [PATCH 07/56] arm64: kvm: Remove kern_hyp_va from get_vcpu_ptr Marc Zyngier
2020-08-05 17:56 ` [PATCH 08/56] KVM: arm64: Drop the target_table[] indirection Marc Zyngier
2020-08-05 17:56 ` [PATCH 09/56] KVM: arm64: Tolerate an empty target_table list Marc Zyngier
2020-08-05 17:56 ` [PATCH 10/56] KVM: arm64: Move ACTLR_EL1 emulation to the sys_reg_descs array Marc Zyngier
2020-08-05 17:56 ` [PATCH 11/56] KVM: arm64: Remove target_table from exit handlers Marc Zyngier
2020-08-05 17:56 ` [PATCH 12/56] KVM: arm64: Remove the target table Marc Zyngier
2020-08-05 17:56 ` [PATCH 13/56] KVM: arm64: Fix symbol dependency in __hyp_call_panic_nvhe Marc Zyngier
2020-08-05 17:56 ` [PATCH 14/56] KVM: arm64: Move __smccc_workaround_1_smc to .rodata Marc Zyngier
2020-08-05 17:56 ` [PATCH 15/56] KVM: arm64: Add build rules for separate VHE/nVHE object files Marc Zyngier
2021-05-04 14:47   ` Auger Eric
2021-05-05 18:03     ` Marc Zyngier
2021-05-10  8:43       ` Auger Eric
2021-05-18 11:48     ` Auger Eric
2021-05-18 11:57       ` Marc Zyngier
2020-08-05 17:56 ` [PATCH 16/56] KVM: arm64: Use build-time defines in has_vhe() Marc Zyngier
2020-08-05 17:56 ` [PATCH 17/56] KVM: arm64: Handle calls to prefixed hyp functions Marc Zyngier
2020-08-05 17:56 ` [PATCH 18/56] KVM: arm64: Build hyp-entry.S separately for VHE/nVHE Marc Zyngier
2020-08-05 17:56 ` [PATCH 19/56] KVM: arm64: Move hyp-init.S to nVHE Marc Zyngier
2020-08-05 17:56 ` [PATCH 20/56] KVM: arm64: Duplicate hyp/tlb.c for VHE/nVHE Marc Zyngier
2020-08-05 17:56 ` [PATCH 21/56] KVM: arm64: Split hyp/switch.c to VHE/nVHE Marc Zyngier
2020-08-05 17:56 ` [PATCH 22/56] KVM: arm64: Split hyp/debug-sr.c " Marc Zyngier
2020-08-05 17:56 ` [PATCH 23/56] KVM: arm64: Split hyp/sysreg-sr.c " Marc Zyngier
2020-08-05 17:56 ` [PATCH 24/56] KVM: arm64: Duplicate hyp/timer-sr.c for VHE/nVHE Marc Zyngier
2020-08-05 17:56 ` [PATCH 25/56] KVM: arm64: Compile remaining hyp/ files for both VHE/nVHE Marc Zyngier
2020-08-05 17:56 ` [PATCH 26/56] KVM: arm64: Remove __hyp_text macro, use build rules instead Marc Zyngier
2020-08-05 17:56 ` [PATCH 27/56] KVM: arm64: Lift instrumentation restrictions on VHE Marc Zyngier
2020-08-05 17:56 ` [PATCH 28/56] KVM: arm64: vgic-its: Change default outer cacheability for {PEND, PROP}BASER Marc Zyngier
2020-08-05 17:56 ` [PATCH 29/56] KVM: arm64: Drop long gone function parameter documentation Marc Zyngier
2020-08-05 17:56 ` [PATCH 30/56] KVM: arm64: Rename HSR to ESR Marc Zyngier
2020-08-05 17:56 ` [PATCH 31/56] arm64: Detect the ARMv8.4 TTL feature Marc Zyngier
2020-08-05 17:56 ` [PATCH 32/56] arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors Marc Zyngier
2020-08-05 17:56 ` [PATCH 33/56] arm64: Add level-hinted TLB invalidation helper Marc Zyngier
2020-08-05 17:56 ` [PATCH 34/56] KVM: arm64: Factor out stage 2 page table data from struct kvm Marc Zyngier
2020-08-05 17:56 ` [PATCH 35/56] KVM: arm64: Use TTL hint in when invalidating stage-2 translations Marc Zyngier
2020-08-05 17:56 ` [PATCH 36/56] KVM: arm64: Introduce accessor for ctxt->sys_reg Marc Zyngier
2020-08-05 17:56 ` [PATCH 37/56] KVM: arm64: hyp: Use ctxt_sys_reg/__vcpu_sys_reg instead of raw sys_regs access Marc Zyngier
2020-08-05 17:56 ` [PATCH 38/56] KVM: arm64: sve: Use __vcpu_sys_reg() " Marc Zyngier
2020-08-05 17:56 ` [PATCH 39/56] KVM: arm64: pauth: Use ctxt_sys_reg() " Marc Zyngier
2020-08-05 17:56 ` [PATCH 40/56] KVM: arm64: debug: Drop useless vpcu parameter Marc Zyngier
2020-08-05 17:56 ` [PATCH 41/56] KVM: arm64: Make struct kvm_regs userspace-only Marc Zyngier
2020-08-05 17:56 ` [PATCH 42/56] KVM: arm64: Move ELR_EL1 to the system register array Marc Zyngier
2020-08-05 17:56 ` [PATCH 43/56] KVM: arm64: Move SP_EL1 " Marc Zyngier
2020-08-05 17:56 ` Marc Zyngier [this message]
2020-08-05 17:56 ` [PATCH 45/56] KVM: arm64: Move SPSR_EL1 " Marc Zyngier
2020-08-05 17:56 ` [PATCH 46/56] KVM: arm64: timers: Rename kvm_timer_sync_hwstate to kvm_timer_sync_user Marc Zyngier
2020-08-05 17:56 ` [PATCH 47/56] KVM: arm64: timers: Move timer registers to the sys_regs file Marc Zyngier
2020-08-19  9:24   ` Jianyong Wu
2020-08-19 10:00     ` Marc Zyngier
2020-08-19 10:18       ` Jianyong Wu
2020-08-19 10:39         ` Marc Zyngier
2020-08-19 12:58           ` Jianyong Wu
2020-08-05 17:56 ` [PATCH 48/56] KVM: arm64: Don't use has_vhe() for CHOOSE_HYP_SYM() Marc Zyngier
2020-08-05 17:56 ` [PATCH 49/56] KVM: arm64: Make nVHE ASLR conditional on RANDOMIZE_BASE Marc Zyngier
2020-08-05 17:56 ` [PATCH 50/56] KVM: arm64: Substitute RANDOMIZE_BASE for HARDEN_EL2_VECTORS Marc Zyngier
2020-08-05 17:56 ` [PATCH 51/56] KVM: arm64: Ensure that all nVHE hyp code is in .hyp.text Marc Zyngier
2020-08-05 17:56 ` [PATCH 52/56] KVM: arm: Add trace name for ARM_NISV Marc Zyngier
2020-08-05 17:56 ` [PATCH 53/56] KVM: arm64: Rename kvm_vcpu_dabt_isextabt() Marc Zyngier
2020-08-05 17:56 ` [PATCH 54/56] KVM: arm64: Handle data and instruction external aborts the same way Marc Zyngier
2020-08-05 17:56 ` [PATCH 55/56] KVM: arm64: Don't skip cache maintenance for read-only memslots Marc Zyngier
2020-08-05 17:57 ` [PATCH 56/56] KVM: arm64: Move S1PTW S2 fault logic out of io_mem_abort() Marc Zyngier
2020-08-05 18:27 ` [GIT PULL] KVM/arm64 updates for 5.9 Paolo Bonzini
2020-08-09 16:13 ` Paolo Bonzini

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