Linux KVM/arm64 development list
 help / color / mirror / Atom feed
From: David Brazdil <dbrazdil@google.com>
To: Marc Zyngier <maz@kernel.org>
Cc: kernel-team@android.com, Srinivas Ramana <sramana@codeaurora.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	linux-kernel@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
	Ajay Patil <pajay@qti.qualcomm.com>,
	Prasad Sodagudi <psodagud@codeaurora.org>,
	Will Deacon <will@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall
Date: Mon, 18 Jan 2021 11:25:16 +0000	[thread overview]
Message-ID: <20210118112516.6a7lnrtbjvey4iiv@google.com> (raw)
In-Reply-To: <20210118094533.2874082-5-maz@kernel.org>

On Mon, Jan 18, 2021 at 09:45:16AM +0000, Marc Zyngier wrote:
> As we are about to change the way a VHE system boots, let's
> provide the core helper, in the form of a stub hypercall that
> enables VHE and replicates the full EL1 context at EL2, thanks
> to EL1 and VHE-EL2 being extremely similar.
> 
> On exception return, the kernel carries on at EL2. Fancy!
> 
> Nothing calls this new hypercall yet, so no functional change.
> 
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
>  arch/arm64/include/asm/virt.h |  7 +++-
>  arch/arm64/kernel/hyp-stub.S  | 67 +++++++++++++++++++++++++++++++++--
>  2 files changed, 71 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/virt.h b/arch/arm64/include/asm/virt.h
> index ee6a48df89d9..7379f35ae2c6 100644
> --- a/arch/arm64/include/asm/virt.h
> +++ b/arch/arm64/include/asm/virt.h
> @@ -35,8 +35,13 @@
>   */
>  #define HVC_RESET_VECTORS 2
>  
> +/*
> + * HVC_VHE_RESTART - Upgrade the CPU from EL1 to EL2, if possible
> + */
> +#define HVC_VHE_RESTART	3
> +
>  /* Max number of HYP stub hypercalls */
> -#define HVC_STUB_HCALL_NR 3
> +#define HVC_STUB_HCALL_NR 4
>  
>  /* Error returned when an invalid stub number is passed into x0 */
>  #define HVC_STUB_ERR	0xbadca11
> diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
> index 160f5881a0b7..fb12398b5c28 100644
> --- a/arch/arm64/kernel/hyp-stub.S
> +++ b/arch/arm64/kernel/hyp-stub.S
> @@ -8,9 +8,9 @@
>  
>  #include <linux/init.h>
>  #include <linux/linkage.h>
> -#include <linux/irqchip/arm-gic-v3.h>
>  
>  #include <asm/assembler.h>
> +#include <asm/el2_setup.h>
>  #include <asm/kvm_arm.h>
>  #include <asm/kvm_asm.h>
>  #include <asm/ptrace.h>
> @@ -47,10 +47,13 @@ SYM_CODE_END(__hyp_stub_vectors)
>  
>  SYM_CODE_START_LOCAL(el1_sync)
>  	cmp	x0, #HVC_SET_VECTORS
> -	b.ne	2f
> +	b.ne	1f
>  	msr	vbar_el2, x1
>  	b	9f
>  
> +1:	cmp	x0, #HVC_VHE_RESTART
> +	b.eq	mutate_to_vhe
> +
>  2:	cmp	x0, #HVC_SOFT_RESTART
>  	b.ne	3f
>  	mov	x0, x2
> @@ -70,6 +73,66 @@ SYM_CODE_START_LOCAL(el1_sync)
>  	eret
>  SYM_CODE_END(el1_sync)
>  
> +// nVHE? No way! Give me the real thing!
> +SYM_CODE_START_LOCAL(mutate_to_vhe)
> +	// Sanity check: MMU *must* be off
> +	mrs	x0, sctlr_el2
> +	tbnz	x0, #0, 1f
> +
> +	// Needs to be VHE capable, obviously
> +	mrs	x0, id_aa64mmfr1_el1
> +	ubfx	x0, x0, #ID_AA64MMFR1_VHE_SHIFT, #4
> +	cbz	x0, 1f

nit: There is a HVC_STUB_ERR that you could return if these sanity checks fail.
The documentation also states that it should be returned on error.

> +
> +	// Engage the VHE magic!
> +	mov_q	x0, HCR_HOST_VHE_FLAGS
> +	msr	hcr_el2, x0
> +	isb
> +
> +	// Doesn't do much on VHE, but still, worth a shot
> +	init_el2_state vhe
> +
> +	// Use the EL1 allocated stack, per-cpu offset
> +	mrs	x0, sp_el1
> +	mov	sp, x0
> +	mrs	x0, tpidr_el1
> +	msr	tpidr_el2, x0
> +
> +	// FP configuration, vectors
> +	mrs_s	x0, SYS_CPACR_EL12
> +	msr	cpacr_el1, x0
> +	mrs_s	x0, SYS_VBAR_EL12
> +	msr	vbar_el1, x0
> +
> +	// Transfer the MM state from EL1 to EL2
> +	mrs_s	x0, SYS_TCR_EL12
> +	msr	tcr_el1, x0
> +	mrs_s	x0, SYS_TTBR0_EL12
> +	msr	ttbr0_el1, x0
> +	mrs_s	x0, SYS_TTBR1_EL12
> +	msr	ttbr1_el1, x0
> +	mrs_s	x0, SYS_MAIR_EL12
> +	msr	mair_el1, x0
> +	isb
> +
> +	// Invalidate TLBs before enabling the MMU
> +	tlbi	vmalle1
> +	dsb	nsh
> +
> +	// Enable the EL2 S1 MMU, as set up from EL1
> +	mrs_s	x0, SYS_SCTLR_EL12
> +	set_sctlr_el1	x0
> +
> +	// Hack the exception return to stay at EL2
> +	mrs	x0, spsr_el1
> +	and	x0, x0, #~PSR_MODE_MASK
> +	mov	x1, #PSR_MODE_EL2h
> +	orr	x0, x0, x1
> +	msr	spsr_el1, x0
> +
> +1:	eret
> +SYM_CODE_END(mutate_to_vhe)
> +
>  .macro invalid_vector	label
>  SYM_CODE_START_LOCAL(\label)
>  	b \label
> -- 
> 2.29.2
> 
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

  reply	other threads:[~2021-01-18 11:25 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-18  9:45 [PATCH v4 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 01/21] arm64: Fix labels in el2_setup macros Marc Zyngier
2021-01-18 11:13   ` David Brazdil
2021-01-18  9:45 ` [PATCH v4 02/21] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-01-20 18:18   ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 03/21] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-01-20 18:18   ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-01-18 11:25   ` David Brazdil [this message]
2021-01-24 18:44     ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 05/21] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 07/21] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 08/21] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-01-20 18:35   ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 09/21] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-01-22 18:41   ` Catalin Marinas
2021-01-23 15:59   ` Suzuki K Poulose
2021-01-18  9:45 ` [PATCH v4 10/21] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-01-22 18:53   ` Catalin Marinas
2021-01-23 16:04     ` Suzuki K Poulose
2021-01-18  9:45 ` [PATCH v4 11/21] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-01-22 18:55   ` Catalin Marinas
2021-01-23 13:25   ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 12/21] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-01-18 13:07   ` David Brazdil
2021-01-23 13:23   ` Catalin Marinas
2021-01-23 13:43   ` Catalin Marinas
2021-01-24 16:21     ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Marc Zyngier
2021-01-23 14:04   ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 14/21] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-01-18 13:14   ` David Brazdil
2021-01-23 14:07   ` Catalin Marinas
2021-01-24 15:59     ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 15/21] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-01-18 13:18   ` David Brazdil
2021-01-24 19:01     ` Marc Zyngier
2021-01-23 14:12   ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 16/21] arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-01-23 14:15   ` [PATCH v4 16/21] arm64: Make kvm-arm.mode={nvhe,protected} " Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 17/21] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-01-18 13:29   ` David Brazdil
2021-01-18  9:45 ` [PATCH v4 18/21] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-01-18 14:46   ` David Brazdil
2021-01-24 18:41     ` Marc Zyngier
2021-01-23 14:19   ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 19/21] arm64: cpufeatures: Allow disabling of BTI from the command-line Marc Zyngier
2021-01-23 14:24   ` Catalin Marinas
2021-01-26 20:35     ` Srinivas Ramana
2021-01-18  9:45 ` [PATCH v4 20/21] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-01-23 14:26   ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Marc Zyngier
2021-01-23 14:28   ` Catalin Marinas
2021-01-26 20:30     ` Srinivas Ramana
2021-01-18 14:54 ` [PATCH v4 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth David Brazdil

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210118112516.6a7lnrtbjvey4iiv@google.com \
    --to=dbrazdil@google.com \
    --cc=ardb@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=kernel-team@android.com \
    --cc=kvmarm@lists.cs.columbia.edu \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=maz@kernel.org \
    --cc=pajay@qti.qualcomm.com \
    --cc=psodagud@codeaurora.org \
    --cc=sramana@codeaurora.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox